Kevin Kim
|
07a43e1935
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip
|
2023-03-20 13:06:10 -07:00 |
|
David Harris
|
0ecde4ab4f
|
formatting cleanup
|
2023-03-20 12:45:10 -07:00 |
|
Kevin Kim
|
9e5360e31f
|
format + min/max structural mux
|
2023-03-20 09:37:57 -07:00 |
|
David Harris
|
471305bda0
|
Eliminate transitions to FLUSH and WRITEBACK in cachefsm for READ_ONLY_CACHE
|
2023-03-19 10:41:47 -07:00 |
|
David Harris
|
835381a122
|
Removed flq from LLEN=64
|
2023-03-19 10:25:04 -07:00 |
|
David Harris
|
02e7e7d011
|
Added comments about PMP checker fixes when test cases will be ready to initialize PMP before entering user mode
|
2023-03-19 05:46:34 -07:00 |
|
David Harris
|
031cc6967a
|
Fix Issue #120 about SIE/SIP being 0 unless MIDELEG bits are set. However, this fix breaks the wally32/64priv tests in regression.
|
2023-03-18 10:10:58 -07:00 |
|
David Harris
|
70e4c71f41
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-03-18 09:24:37 -07:00 |
|
David Harris
|
08ce265420
|
Replaced FenceM with InvalidateICacheM for event counting of fence.i
|
2023-03-18 09:24:31 -07:00 |
|
Ross Thompson
|
407b3c488d
|
Book updates.
|
2023-03-14 13:09:50 -05:00 |
|
Ross Thompson
|
a27051b8a8
|
Updated NextAdr to NextSet.
|
2023-03-13 14:54:13 -05:00 |
|
Ross Thompson
|
cb019f9aed
|
Updated CAdr to CacheSet.
|
2023-03-13 14:53:00 -05:00 |
|
Ross Thompson
|
ede9d49ce4
|
Changes BTA to BPBTA.
|
2023-03-12 14:36:46 -05:00 |
|
Ross Thompson
|
e233b63752
|
Replaced DCACHE parameter with READ_ONLY_CACHE as the name was confusing in chapter 10.
|
2023-03-12 13:21:22 -05:00 |
|
Kevin Kim
|
bc9cd4a26e
|
more checks in bitmanip decode
|
2023-03-10 17:17:24 -08:00 |
|
Kevin Kim
|
869c7283e8
|
formatting
|
2023-03-10 14:32:01 -08:00 |
|
Kevin Kim
|
827cf567e6
|
removed redundant convinvb signal
|
2023-03-10 14:18:24 -08:00 |
|
Kevin Kim
|
a5841c6fb2
|
removed redundant condinvb mux
|
2023-03-10 14:17:38 -08:00 |
|
David Harris
|
ed22433916
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-03-10 12:47:30 -08:00 |
|
David Harris
|
2614448218
|
Simplified SLT and SLTU code in ALU
|
2023-03-09 15:14:52 -08:00 |
|
Kevin Kim
|
6ee15c6e2c
|
more comprehensive illegal b instr. check
|
2023-03-09 12:44:51 -08:00 |
|
Kevin Kim
|
5853854f52
|
fixed bmu bug
- accidentally deleted count instruction decode
|
2023-03-09 12:35:42 -08:00 |
|
Ross Thompson
|
fa8a550e12
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-03-09 13:29:38 -06:00 |
|
Kevin Kim
|
ba13f6794e
|
Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip
|
2023-03-08 16:22:47 -08:00 |
|
Kevin Kim
|
2175702f6d
|
cleaner bmu decode logic
|
2023-03-08 16:22:43 -08:00 |
|
Ross Thompson
|
6d2d7d181e
|
Updated testbench to record coremark performance counters.
Added comment about mtval probably not being correct for compressed instructions.
|
2023-03-08 17:11:27 -06:00 |
|
kipmacsaigoren
|
10e0935207
|
Merge branch 'openhwgroup:main' into bit-manip
|
2023-03-07 21:29:03 -08:00 |
|
David Harris
|
ec0873ff16
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-03-07 14:49:23 -08:00 |
|
Kevin Kim
|
f2090d25c4
|
Merge branch 'bit-manip' into illegal_specific
|
2023-03-07 14:07:59 -08:00 |
|
Kevin Kim
|
8eb4eb2100
|
Merge branch 'openhwgroup:main' into illegal_specific
|
2023-03-07 14:06:22 -08:00 |
|
Kevin Kim
|
20af58cdd4
|
alu formatting
|
2023-03-07 14:01:47 -08:00 |
|
Kevin Kim
|
b33b0afc77
|
specifc instruction handling for B's
- Added BALUSrcBD, BaseALUSrcB for distinguishing between base instruction I/IW and Bitmanip instruction I/IW
|
2023-03-07 13:58:08 -08:00 |
|
kipmacsaigoren
|
01f78835cb
|
Merge branch 'openhwgroup:main' into priv-tests
|
2023-03-07 13:46:55 -08:00 |
|
Kip Macsai-Goren
|
1ceaaad592
|
Merge remote-tracking branch 'upstream/main' into bit-manip
|
2023-03-07 13:45:04 -08:00 |
|
Kip Macsai-Goren
|
47bbe72d1f
|
Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip
|
2023-03-07 13:44:51 -08:00 |
|
Kip Macsai-Goren
|
34c0f86d37
|
Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip
|
2023-03-07 13:44:19 -08:00 |
|
Kevin Kim
|
3b874b964f
|
Merge remote-tracking branch 'origin' into illegal_specific
|
2023-03-07 11:30:36 -08:00 |
|
Kevin Kim
|
dc456415c1
|
formatting
|
2023-03-07 10:57:52 -08:00 |
|
Kevin Kim
|
7ec33ca094
|
shifter sign generation logic optimize
|
2023-03-07 10:57:06 -08:00 |
|
David Harris
|
dce6d33531
|
editorconfig to specify tabs/spaces. Fixed some tabs. Turn off coverage to speed up simulation
|
2023-03-07 06:31:40 -08:00 |
|
Kevin Kim
|
7651d41c90
|
reverted backing to working version
|
2023-03-07 00:29:58 -08:00 |
|
Kevin Kim
|
8c20d67659
|
reverted to working version
|
2023-03-07 00:28:07 -08:00 |
|
Ross Thompson
|
17f80285ca
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-03-06 22:29:27 -06:00 |
|
Ross Thompson
|
b8dca927f2
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-03-06 18:39:15 -06:00 |
|
Ross Thompson
|
4b539de184
|
Renamed signals to be consistent with textbook.
|
2023-03-06 18:29:31 -06:00 |
|
Ross Thompson
|
6fc157e628
|
Renamed PCFSpill to PCSpillF.
|
2023-03-06 17:50:57 -06:00 |
|
Ross Thompson
|
e831efddaf
|
Renamed InstrFirstHalf to InstrFirstHalfF.
|
2023-03-06 17:48:57 -06:00 |
|
Ross Thompson
|
82ada79b11
|
Renamed ebuarbfsm to ebufsmarb to match figures.
|
2023-03-06 17:47:55 -06:00 |
|
David Harris
|
4fd461e520
|
Fixed bug about rv64 shifts only using 6 bits of funct7
|
2023-03-06 13:10:51 -08:00 |
|
David Harris
|
94dd39795e
|
Simplified decoder default to illegal instruction
|
2023-03-06 11:21:11 -08:00 |
|
David Harris
|
08f1ed8e53
|
More detailed decoding of load/store/branch/jump
|
2023-03-06 11:15:48 -08:00 |
|
David Harris
|
a01e0bd318
|
Improved decoding illegal instructions in controller
|
2023-03-06 11:02:42 -08:00 |
|
Kevin Kim
|
4a31ab1bc3
|
structural changes in cnt.sv
|
2023-03-06 06:44:15 -08:00 |
|
Kevin Kim
|
45697f050d
|
formatting
|
2023-03-06 06:20:25 -08:00 |
|
Kevin Kim
|
c38a5d9151
|
formatting
- reverted back to ALUResult signal in alu.sv
|
2023-03-06 06:19:01 -08:00 |
|
Kevin Kim
|
474b69967a
|
formatted files
|
2023-03-06 05:52:08 -08:00 |
|
Kevin Kim
|
288c7ad48c
|
updated license header
|
2023-03-06 05:41:53 -08:00 |
|
Kevin Kim
|
cec1e89c78
|
bug fix
|
2023-03-05 15:20:48 -08:00 |
|
Kevin Kim
|
19beed7866
|
extend unit structural mux
|
2023-03-05 15:09:02 -08:00 |
|
Kevin Kim
|
7531bf1fd6
|
zbb result select mux structural
|
2023-03-05 14:57:30 -08:00 |
|
Kevin Kim
|
3656d42ac0
|
zbc input mux structural
|
2023-03-05 14:26:31 -08:00 |
|
Kevin Kim
|
869e812aa8
|
revA signals to cnt, zbb
|
2023-03-05 14:26:24 -08:00 |
|
Kevin Kim
|
0e6ea0ee60
|
ALU changes
- added PreShiftAmt signal for shadd
- condinvB now muxes from B instead of mask
|
2023-03-05 14:06:24 -08:00 |
|
Kevin Kim
|
3d5ee8d964
|
bug in bctrl
- deleted the min/minu decoding for some reason.
|
2023-03-04 23:56:33 -08:00 |
|
Kevin Kim
|
6ead150cb1
|
BSelect from OH encoding to Binary
|
2023-03-04 23:19:31 -08:00 |
|
Kevin Kim
|
4b1ee5a196
|
alu pre-shift
-changed ALU pre shift logic to use a 2 bit shifter instead of mux
|
2023-03-04 23:07:06 -08:00 |
|
Kevin Kim
|
b0f152de28
|
added python script
-I've been using this python script to make quick changes to the bitmanip controller
|
2023-03-04 22:54:32 -08:00 |
|
Kevin Kim
|
499c3c5c30
|
Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip
|
2023-03-04 22:44:09 -08:00 |
|
Kevin Kim
|
6295178073
|
removed rotate signal in datapath and instead packed into the new BALUControl Signal
- BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU
|
2023-03-04 22:44:03 -08:00 |
|
Kip Macsai-Goren
|
0ba1a59a70
|
added reset values to stime and stimecmp registers
|
2023-03-04 15:06:15 -08:00 |
|
Kip Macsai-Goren
|
e76e7120c0
|
Merge remote-tracking branch 'upstream/main' into bit-manip
|
2023-03-04 14:43:12 -08:00 |
|
Kevin Kim
|
b6dd855395
|
zbc result mux is now structural
|
2023-03-04 09:22:21 -08:00 |
|
Kevin Kim
|
6e52113208
|
Rotate signal now gets generated in bmu ctrl
|
2023-03-03 22:57:49 -08:00 |
|
Kevin Kim
|
18ab538a5e
|
license comments
|
2023-03-03 21:52:34 -08:00 |
|
Kevin Kim
|
efce306aab
|
removed redundant signals in controller
|
2023-03-03 21:52:25 -08:00 |
|
Kevin Kim
|
448e950eba
|
b controller generates comparison signed flag and controller branch signed logic updated accordingly
|
2023-03-03 17:12:29 -08:00 |
|
Ross Thompson
|
dea5aae01e
|
Merge pull request #126 from davidharrishmc/dev
ImperasDV setup
|
2023-03-03 18:01:32 -06:00 |
|
David Harris
|
39c871ee0c
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-03-03 15:54:42 -08:00 |
|
Kevin Kim
|
0bb75132c6
|
sltD signal debug. Passes regression
|
2023-03-03 12:44:33 -08:00 |
|
Kevin Kim
|
d24f74dc4b
|
sltD logic optimize
|
2023-03-03 12:35:40 -08:00 |
|
Kevin Kim
|
66b15b9163
|
Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate
|
2023-03-03 09:54:08 -08:00 |
|
Kevin Kim
|
0dee48fa5c
|
Merge branch 'openhwgroup:main' into bctrlmigrate
|
2023-03-03 09:53:59 -08:00 |
|
Kevin Kim
|
77c9114bcc
|
removed outdated b-signals in controller
|
2023-03-03 08:45:42 -08:00 |
|
Kevin Kim
|
2b9a6aba91
|
comments to bctrl
|
2023-03-03 08:41:47 -08:00 |
|
Kevin Kim
|
11f165d1bb
|
migrated B-subarith logic into b controller
|
2023-03-03 08:40:29 -08:00 |
|
Kevin Kim
|
b5a5f364e1
|
began subarith configurability optimization in controller
|
2023-03-03 08:27:11 -08:00 |
|
Ross Thompson
|
7dd8fa16c1
|
Renamed BTB misprediction to BTA.
|
2023-03-03 00:18:34 -06:00 |
|
Ross Thompson
|
bdab2c8506
|
Added divide cycle counter.
|
2023-03-02 23:59:52 -06:00 |
|
Ross Thompson
|
4b501f6e03
|
Added the i and d cache cycle counters.
|
2023-03-02 23:54:56 -06:00 |
|
Ross Thompson
|
b19d51b6a2
|
Added fence counter.
|
2023-03-02 23:29:20 -06:00 |
|
Ross Thompson
|
3dbfa96aef
|
Added csr write counter, sfence vma counter, interrupt counter, and exception counter.
|
2023-03-02 23:21:29 -06:00 |
|
Ross Thompson
|
cf4d8e6bd0
|
Added store stall to performance counters.
|
2023-03-02 23:10:54 -06:00 |
|
Ross Thompson
|
e257ec96ac
|
Reordered performance counters and added space for new ones.
|
2023-03-02 23:04:31 -06:00 |
|
David Harris
|
d51d93a3a8
|
Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt)
|
2023-03-02 20:00:47 -08:00 |
|
Kevin Kim
|
f4b8968e12
|
bug fix, more elegant logic changes in controller
|
2023-03-02 16:00:56 -08:00 |
|
Kevin Kim
|
2a0c59d5a7
|
formatting
|
2023-03-02 15:28:43 -08:00 |
|
Kevin Kim
|
d0c486df54
|
removed main instruction decoder dependence on bmu controller
|
2023-03-02 15:28:33 -08:00 |
|
Kevin Kim
|
11a977ffe3
|
added bitmanip illegal instruction signal
|
2023-03-02 15:09:55 -08:00 |
|
Kevin Kim
|
b52208b539
|
zbc comments
|
2023-03-02 13:52:00 -08:00 |
|
Kevin Kim
|
2d7d143f6d
|
formatted bmu decoder
|
2023-03-02 13:45:15 -08:00 |
|
Kevin Kim
|
1b222f91be
|
moved ALUControlD into configurable block
|
2023-03-02 12:17:03 -08:00 |
|
Kevin Kim
|
1e1ecaafb1
|
moved SubArith and RegWriteE into configurable block
|
2023-03-02 12:15:57 -08:00 |
|
Kevin Kim
|
7dd4a2e975
|
added BRegWriteE signal
|
2023-03-02 12:15:22 -08:00 |
|
Kevin Kim
|
d40f3b2a1c
|
rename shifternew to shifter
|
2023-03-02 11:45:32 -08:00 |
|
Kevin Kim
|
905373d53b
|
zbc input select mux optimize
|
2023-03-02 11:43:05 -08:00 |
|
Kevin Kim
|
2bfbf051a5
|
zbc select mux optimization
|
2023-03-02 11:40:29 -08:00 |
|
Kevin Kim
|
44d40afca8
|
fixed controller lint, changed byte unit mux select name and input width
|
2023-03-02 11:36:12 -08:00 |
|
Kevin Kim
|
96995c5593
|
removed redundant zbs
|
2023-03-02 11:22:09 -08:00 |
|
Ross Thompson
|
3d1ffac7d7
|
Cleaned up branch predictor performance counters.
|
2023-03-01 17:05:42 -06:00 |
|
David Harris
|
c761fb1054
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-03-01 11:18:05 -08:00 |
|
David Harris
|
e78591093e
|
Renamed I/D TLBMissOrDAFault to TLBMissOrUpdateDA for consistency with UpdateDA
|
2023-03-01 11:18:00 -08:00 |
|
Ross Thompson
|
a61f8bc4cf
|
Set bp to use instruction class prediction by default.
|
2023-03-01 11:52:42 -06:00 |
|
Ross Thompson
|
e8744684cd
|
Branch predictor cleanup.
I think Ch 10 is now done except for BTB performance analysis and the section on running benchmarks and collecting data.
|
2023-03-01 11:24:24 -06:00 |
|
Ross Thompson
|
08a1153ae9
|
More btb cleanup.
|
2023-03-01 10:47:00 -06:00 |
|
Ross Thompson
|
dd2433f7ff
|
Minor fix to btb.
|
2023-03-01 10:45:40 -06:00 |
|
Ross Thompson
|
2773048bd4
|
Name cleanup.
|
2023-02-28 17:48:58 -06:00 |
|
Kip Macsai-Goren
|
9e52ede0cd
|
Merge remote-tracking branch 'upstream/main' into bit-manip
|
2023-02-28 14:41:51 -08:00 |
|
Kip Macsai-Goren
|
2cab4a2f0a
|
Merge remote-tracking branch 'origin' into bit-manip
|
2023-02-28 14:39:57 -08:00 |
|
Ross Thompson
|
87013ccaf0
|
Found the performance bug with the branch predictor btb power saving update.
|
2023-02-28 15:57:34 -06:00 |
|
Ross Thompson
|
8af61c0cc0
|
Name changes to reflect diagrams.
|
2023-02-28 15:37:25 -06:00 |
|
Ross Thompson
|
a823d8d021
|
Undid the btb update as it reduces performance.
|
2023-02-28 15:21:56 -06:00 |
|
Kevin Kim
|
036cad71c6
|
bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG]
|
2023-02-28 12:09:35 -08:00 |
|
Kevin Kim
|
6835a635cc
|
added BRegWrite, BW64, BALUOp signals to bctrl and controller
-TODO: Main decode in bmuctrl must assert these 3 signals
|
2023-02-28 11:54:10 -08:00 |
|
Kevin Kim
|
82059fba67
|
changed shifter source select signal name
|
2023-02-28 11:41:40 -08:00 |
|
Kevin Kim
|
30ef1ac9e3
|
rename result back to ALUResult in ALU
|
2023-02-28 07:27:34 -08:00 |
|
Ross Thompson
|
3261f31e88
|
This icpred and btb changes are causing a performance issue.
|
2023-02-27 20:00:50 -06:00 |
|
Ross Thompson
|
69e8358639
|
Modified the BTB to save power by not updating when the prediction is unchanged.
|
2023-02-27 17:37:29 -06:00 |
|
Ross Thompson
|
44361f0a34
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-02-27 09:48:03 -06:00 |
|
David Harris
|
5c8fee127b
|
Added support for ZMMUL
|
2023-02-27 07:29:53 -08:00 |
|
Ross Thompson
|
a81cc883e9
|
Signal name changes.
|
2023-02-27 00:39:19 -06:00 |
|
David Harris
|
0d3d499940
|
hptw typo fix
|
2023-02-26 19:38:34 -08:00 |
|
Ross Thompson
|
447f6b1443
|
Branch predictor cleanup.
|
2023-02-26 21:28:36 -06:00 |
|
David Harris
|
907fbfec38
|
Simplified Access fault logic in HPTW
|
2023-02-26 18:50:37 -08:00 |
|
David Harris
|
d3f5708ded
|
StoreAmo faults are generated instead of load faults on AMO operations
|
2023-02-26 18:35:10 -08:00 |
|
Ross Thompson
|
3804626166
|
Create module for instruction class prediction and decoding.
|
2023-02-26 20:20:30 -06:00 |
|
Ross Thompson
|
86f611577f
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
|
2023-02-26 19:58:24 -06:00 |
|
David Harris
|
d2fd34efe6
|
Renamed DAPageFault to UpdateDA
|
2023-02-26 17:51:45 -08:00 |
|
David Harris
|
246deeda82
|
renamed UpperBitsUnequalPageFault to UpperBitsUnequal
|
2023-02-26 17:32:34 -08:00 |
|
David Harris
|
099267ffce
|
moved tlb to subdirectory
|
2023-02-26 17:31:03 -08:00 |
|
David Harris
|
a9e884acc8
|
Moved TLB into subdirectory of MMU
|
2023-02-26 17:28:05 -08:00 |
|
Ross Thompson
|
bb276da6eb
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
|
2023-02-26 12:06:06 -06:00 |
|
David Harris
|
2ad62ea31f
|
Removed unneeded TLBFlush from TLBMiss
|
2023-02-26 10:04:16 -08:00 |
|
David Harris
|
2203c05724
|
Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit)
|
2023-02-26 09:58:34 -08:00 |
|
David Harris
|
4579a9d0c2
|
Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED
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2023-02-26 09:38:32 -08:00 |
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David Harris
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e3e5100f8d
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Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol
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2023-02-26 07:12:43 -08:00 |
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David Harris
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d50658addf
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Fixed missing assign when SSTC is not supported
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2023-02-26 07:12:13 -08:00 |
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David Harris
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27acb90217
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Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0
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2023-02-26 06:30:43 -08:00 |
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Ross Thompson
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7500bb75c6
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PHT was enabled using the wrong ~flush and ~stall.
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2023-02-24 22:57:32 -06:00 |
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Ross Thompson
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63b9f9ca3d
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gshare cleanup.
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2023-02-24 22:55:51 -06:00 |
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Ross Thompson
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ed7ab402ad
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More signal renames.
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2023-02-24 19:56:55 -06:00 |
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