Ross Thompson
403daecc8e
Modified the do scripts to change the DTIM_RANGE and IROM_RANGE to large values from the defaults.
...
The defaults are used for synthesis.
rv64i and rv32i: DTIM 2KiB, IROM 2KiB
rv32ic: DTIM 4KiB, IROM 16KiB
Regression tests require 8MiB or larger so modelsim overrides.
2022-10-11 10:47:13 -05:00
David Harris
e4c5754b3a
Made simple RV64 configuration be RV64i. Eliminated rv64ic and rv64fp. Fixed some bugs related to new width
2022-10-10 09:10:55 -07:00
Ross Thompson
b52f593ecb
Reorganized the configs.
2022-10-09 16:46:48 -05:00
David Harris
f318daa605
Changed RV32i config to use DTIM and bus. Don't use this commit - it will break rv32i tests.
2022-10-05 11:46:52 -07:00
David Harris
437fd52bf6
Gated sticky bit in fdiv with SpecialCase
2022-09-20 20:05:00 -07:00
David Harris
cf5c513221
Restored radix 2 to pass regression
2022-09-20 19:30:16 -07:00
cturek
49a1259cf9
Fixed fgen4
2022-09-20 20:00:01 +00:00
David Harris
33af1f97f7
Define LOGNORMSHIFTSZ
2022-09-20 08:31:57 -07:00
David Harris
a36747fda0
Finished unified divsqrt otfc and fgen name changes
2022-09-19 08:30:59 -07:00
David Harris
1187187a5c
Divide testfloat starts with half-precision tests
2022-09-18 06:46:47 -07:00
David Harris
8438546d52
Fixed regression for divsqrt radix2
2022-09-07 06:12:23 -07:00
David Harris
e64f41f199
Checking in radix 4 square root with qsel, fgen, softc, but not working
2022-08-31 10:54:50 -07:00
David Harris
5956fbdd62
Fixed checking termination in testfloat testbench
2022-08-30 10:55:21 -07:00
David Harris
e526fea68a
fixed wally-config
2022-08-26 22:13:10 -07:00
David Harris
bd6f2444cd
Fixed address decoder hanging buildroot
2022-08-26 22:01:25 -07:00
David Harris
bf2c20cd17
Fixed DTIM/IROM_BASE number of bits in buildroot/fpga configs
2022-08-26 21:29:26 -07:00
David Harris
76006825b3
Set bit width of DMEM/IROM_SUPPORTED and fixed address decoding
2022-08-26 21:18:18 -07:00
David Harris
921a49921b
Set correct size of IROM/DTIM and allow FLEN>XLEN with DTIM
2022-08-26 21:05:20 -07:00
David Harris
460a95f99b
Added IROM and DTIM decoding to adrdecs
2022-08-26 20:45:43 -07:00
David Harris
6409548c8b
Replaced DTIM and IROM with DTIM_SUPPORTED, IROM_SUPPORTED, and base and range for each
2022-08-26 20:26:12 -07:00
David Harris
906f6f2990
Renamed DMEM to DTIM and added checks about compatibility of DTIM/IROM and virtmem
2022-08-26 20:12:03 -07:00
Ross Thompson
4ad7ccc7f7
Possible fixes for earily messup of rv32ic and rv64ic configs.
2022-08-25 14:42:08 -05:00
Ross Thompson
bd9401179d
BROKEN. Don't use this commit.
...
Issue running cacheless with bus.
2022-08-25 11:02:46 -05:00
Ross Thompson
b650d7e05a
Renamed RAM to UNCORE_RAM.
2022-08-24 18:09:07 -05:00
Ross Thompson
c6927d2ace
Modified the lsu/ifu memory configurations.
2022-08-24 12:35:15 -05:00
David Harris
7c91ed38a3
LSU minor edits
2022-08-23 07:35:47 -07:00
Katherine Parry
1accb92745
sqrt passes - lint warnings remain
2022-08-22 17:16:12 +00:00
Katherine Parry
8eeca3319c
radix-2 1 copy passes testfloat
2022-08-06 22:54:05 +00:00
Katherine Parry
8f1d8669b0
fixed fsw problem and removed 2 bit shift from shift correction
2022-08-03 22:16:51 +00:00
Ross Thompson
856ac24686
Removed replay from the config files.
2022-07-24 00:34:11 -05:00
Katherine Parry
ee7932c804
divider sizes reworked to match book
2022-07-22 22:02:04 +00:00
Katherine Parry
270216dd02
radix-4 division integrated into srt - not tested
2022-07-21 19:38:06 +00:00
Katherine Parry
e251022269
merged floating-point radix-2 divider with radix-4
2022-07-15 20:16:59 +00:00
cturek
38bbd19abf
Six tests passing and a bunch of sizizing issues fixed
2022-07-14 19:38:27 +00:00
Katherine Parry
b069cfbec2
fixed error in divsqrt
2022-07-14 18:16:00 +00:00
cturek
7629173b15
DIVLEN and counter updated for sqrt computation and rounding
2022-07-13 22:42:39 +00:00
cturek
d57fb6f98a
radix 4 files removed from srt and divlen modified for sqrt
2022-07-13 19:46:48 +00:00
Katherine Parry
e05b2a07d2
removed warnings and took a mux out of the critical path
2022-07-12 18:32:17 -07:00
Katherine Parry
b728e5054d
variable interations implemented in radix-4 divider
2022-07-11 18:30:21 -07:00
Katherine Parry
41c16be012
srt divider merged into fpu
2022-07-07 16:01:33 -07:00
Katherine Parry
08769e35ae
modified wally shared
2022-07-07 21:59:43 +00:00
David Harris
88e3233935
Preliminary SRAM integration
2022-07-07 19:56:20 +00:00
Katherine Parry
1b4584e825
Renaming signals to match chapter
2022-07-03 12:26:22 -07:00
cturek
3a40c68549
Updated radix 2 divider to work with integers and floats in new structure. Integers still might not work.
2022-06-27 23:55:21 +00:00
Katherine Parry
06f7f9b147
fixed commented out error and removed killprod from result selection
2022-06-25 01:42:23 +00:00
slmnemo
7c019ea074
Removed references to initialization files
2022-06-23 16:50:27 -07:00
Katherine Parry
b54d84195f
added radix-4 0/d handling
2022-06-23 22:36:19 +00:00
Katherine Parry
4a6dee5926
Testfloat running division - not passing
2022-06-23 00:07:34 +00:00
Katherine Parry
254ebf478e
added fld in rv32 - needs testing
2022-06-20 22:53:13 +00:00
Katherine Parry
8425f8838d
hopefully fixed lint error
2022-06-17 00:14:39 +00:00
