forked from Github_Repos/cvw
Fixed DTIM/IROM_BASE number of bits in buildroot/fpga configs
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@ -86,11 +86,11 @@
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// Peripheral memory space extends from BASE to BASE+RANGE
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// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
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`define DTIM_SUPPORTED 1'b0
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`define DTIM_BASE 34'h80000000
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`define DTIM_RANGE 34'h00001FFF
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`define DTIM_BASE 56'h80000000
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`define DTIM_RANGE 56'h00001FFF
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`define IROM_SUPPORTED 1'b0
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`define IROM_BASE 34'h80000000
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`define IROM_RANGE 34'h00001FFF
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`define IROM_BASE 56'h80000000
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`define IROM_RANGE 56'h00001FFF
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`define BOOTROM_SUPPORTED 1'b1
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`define BOOTROM_BASE 56'h00001000
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`define BOOTROM_RANGE 56'h00000FFF
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@ -88,11 +88,11 @@
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// Peripheral memory space extends from BASE to BASE+RANGE
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// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
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`define DTIM_SUPPORTED 1'b0
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`define DTIM_BASE 34'h80000000
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`define DTIM_RANGE 34'h00001FFF
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`define DTIM_BASE 56'h80000000
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`define DTIM_RANGE 56'h00001FFF
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`define IROM_SUPPORTED 1'b0
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`define IROM_BASE 34'h80000000
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`define IROM_RANGE 34'h00001FFF
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`define IROM_BASE 56'h80000000
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`define IROM_RANGE 56'h00001FFF
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`define BOOTROM_SUPPORTED 1'b1
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`define BOOTROM_BASE 56'h00001000
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