Commit Graph

100 Commits

Author SHA1 Message Date
Ross Thompson
5c52827f51 Cleanup. 2023-02-24 18:20:42 -06:00
Ross Thompson
d030d323fd Completed critical path gshare fix. 2023-02-24 18:02:00 -06:00
Ross Thompson
c2021927ce Prep to fix gshare critical path. 2023-02-24 17:54:48 -06:00
Ross Thompson
4ffaa75c2a Modified btb forwarding logic to reduce critical path. 2023-02-24 17:47:43 -06:00
Ross Thompson
6e8791a0a5 Major cleanup of bp. 2023-02-23 16:19:03 -06:00
Ross Thompson
d880720b7e Partial replacement of InstrClassX with {JalX, RetX, JumpX, and BranchX}. 2023-02-23 15:55:34 -06:00
Ross Thompson
500764f97b Branch predictor cleanup. 2023-02-23 15:15:14 -06:00
Ross Thompson
70f7f59332 Moved more branch predictor logic into the performance counter block. 2023-02-23 15:14:56 -06:00
Ross Thompson
195343c84f Added if generate around bp logic only used with performance counters. 2023-02-23 14:39:31 -06:00
Ross Thompson
ed91fc5ce3 Renamed PCPredX to BTAX. 2023-02-23 14:33:32 -06:00
Ross Thompson
1af7b8051e Fixed bug in basic gshare. 2023-02-22 12:54:46 -06:00
Ross Thompson
fd5b940839 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-22 09:11:57 -06:00
Ross Thompson
5ecbc830cf Oups. Turns out dc_shell does not like string parameters.
Switched gshare to use an integer parameter to select between gshare and global.
2023-02-22 09:11:46 -06:00
David Harris
bc4410e686 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-21 09:58:18 -08:00
David Harris
8df7768d32 Fixed Issue #65 fmv sign selection. Sign needs to come from most significant bit of raw X source without doing NaN Box fixes first. 2023-02-21 09:57:57 -08:00
David Harris
0b9fd8a4b3 Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well. 2023-02-21 09:32:17 -08:00
Ross Thompson
fd5c12431e Fixed typo in the global branch predictor. 2023-02-20 18:48:02 -06:00
Ross Thompson
d2e06d9ef0 Cleanup branch predictor files. 2023-02-20 18:45:45 -06:00
Ross Thompson
a14c71bd95 Renamed branch predictors and consolidated global and gshare predictors. 2023-02-20 18:42:37 -06:00
Ross Thompson
68e39eeb66 Fixed another bug in the btb. 2023-02-20 17:54:22 -06:00
Ross Thompson
5187c78184 Fixed forwarding bug in the BTB. 2023-02-20 17:03:45 -06:00
Ross Thompson
d887124837 Found a bug where the d and i cache misses were not recorded in the performance counters. 2023-02-20 16:00:29 -06:00
Ross Thompson
1982c66b72 Simiplified BTB. 2023-02-20 15:39:42 -06:00
David Harris
bdcd867c11 Removed test code that broke LSU 2023-02-20 12:42:46 -08:00
David Harris
c6c21463d9 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-20 11:28:15 -08:00
David Harris
081a817925
Merge pull request #98 from ross144/main
New gshare implementation
2023-02-20 11:27:47 -08:00
David Harris
023ba68088 Extraction script updates to match new reports names 2023-02-20 10:16:45 -08:00
David Harris
df9950483e Removed unused and incomplete ROM macro instantations 2023-02-20 05:59:57 -08:00
David Harris
a59526fc8e Fixed IROM size parameters 2023-02-20 05:32:43 -08:00
David Harris
1d3b41e0fb New expression for BTB_SIZE to avoid error during sky90 synthesis 2023-02-20 04:02:00 -08:00
Ross Thompson
2d417c33a4 Simplified BTB by removing the valid bit. the instruction class provides the equivalent information. 2023-02-19 23:53:20 -06:00
Ross Thompson
0d79c0cebe Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-19 22:54:27 -06:00
Ross Thompson
b32093b33b Simplified branch predictor. 2023-02-19 22:49:48 -06:00
David Harris
0ac9c9e62a Added BTB_SIZE parameter independent of BPRED_SIIZE 2023-02-19 20:13:50 -08:00
David Harris
5b197f4f9d Parameterized btb to depend on BPRED_SIZE 2023-02-19 19:59:07 -08:00
David Harris
06872e3822 Adjusted DTIM to always be 512B independent of XLEN 2023-02-19 16:14:38 -08:00
David Harris
5b8d1e4134 PMP checker size check to avoid spurious warnings 2023-02-19 16:08:23 -08:00
David Harris
ac21bed64d Moved conditional instantiation outside pmpchecker 2023-02-19 15:31:00 -08:00
David Harris
7d031fcae0 Disabled W64M register for RV32 2023-02-19 07:03:31 -08:00
David Harris
6d405ad69b Fixed RAM instantiations 2023-02-19 06:31:41 -08:00
Ross Thompson
9ee48637dc Possibly much better branch predictor implemention.
The complexity is significantly reduced.
2023-02-19 00:17:37 -06:00
Ross Thompson
d44cb1febb Minor fix. 2023-02-18 23:55:46 -06:00
David Harris
0eda753dc4 Removed unused PredInstrClassE register from bpred 2023-02-18 05:59:25 -08:00
David Harris
0f4226a950 Removed unused weq0M register fron fdivsqrtpostproc 2023-02-18 05:57:39 -08:00
David Harris
66e5c60fb4 Fixed issue #57 of sign selection for improperly NaN-boxed number 2023-02-18 05:34:40 -08:00
David Harris
5986931fdc Fixed unpacking of illegal NaN box. Fixed issue #56 of sign injection NaN 2023-02-18 05:25:38 -08:00
David Harris
dc19f8a8ec Created PostBox signal to NaN-box malformed NaNs of excess length. Fixes Issue #55 2023-02-17 20:51:43 -08:00
David Harris
a194740562 Fixed RAM bugs and refactored with read taking place after clock edge rather than before. 2023-02-17 19:14:38 -08:00
David Harris
9275bfb839 Memory synthesis updates 2023-02-17 15:33:49 -08:00
David Harris
2060683770 Continue fixing memory macros for synthesis 2023-02-17 15:15:37 -08:00