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480 Commits

Author SHA1 Message Date
Kevin Kim
eb8fe3ed17 Zero/Sign extend mux in Shifter, Zero extend mux in Bitmanip alu 2023-03-24 11:52:51 -07:00
David Harris
a5e569245b Shifter capitalization 2023-03-24 09:01:07 -07:00
Ross Thompson
2956c11dbc Renamed ebu signal. 2023-03-24 10:51:04 -05:00
David Harris
9f1c1958a6 Query about CondExtA 2023-03-24 08:35:33 -07:00
David Harris
34e0b3bc61 Shifter sign simplification and capitalization 2023-03-24 08:27:30 -07:00
David Harris
25a1ea7d23 FPU detect illegal instructions 2023-03-24 08:12:32 -07:00
David Harris
59f948d47c Start of EBU coverage tests 2023-03-24 08:12:02 -07:00
David Harris
d04f4cedf6 ALUControl Elimination 2023-03-24 08:10:48 -07:00
David Harris
ac0b669518 Merged ALUOp into ALUControl to simplify ALU mux 2023-03-24 07:28:42 -07:00
David Harris
9ffac8315b Simplified rotate source to shifter 2023-03-24 06:49:26 -07:00
David Harris
c6561fffd4 BMU simplifications 2023-03-24 06:18:06 -07:00
David Harris
e67b077a3e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-24 05:59:48 -07:00
Kevin Kim
3ec4b23ff5 minor formatting 2023-03-23 22:28:21 -07:00
Kevin Kim
f07397df76 comments 2023-03-23 22:22:25 -07:00
Kevin Kim
125cb0ce44 removed redundant signals 
-fixed some comments too
 2023-03-23 22:20:37 -07:00
Kevin Kim
969b2723ef bitmanip alu submodule passes lint and regression 2023-03-23 21:56:03 -07:00
Kevin Kim
e2a5c87b73 more progress. Failing regression 2023-03-23 20:42:49 -07:00
Kevin Kim
1eb04d9747
Merge branch 'openhwgroup:main' into bitmanip-alu 2023-03-23 19:53:50 -07:00
David Harris
dc156cc09c Removed unnecessary XZero from fdivsqrt 2023-03-23 17:25:59 -07:00
David Harris
7e947023c1 Merged BMU 2023-03-23 17:24:40 -07:00
Kevin Kim
f9fc30e1cb fixed rori rv32 bug 2023-03-23 16:06:46 -07:00
Kevin Kim
7b1567829c more progress on bitmanip alu modularization 2023-03-23 16:02:38 -07:00
David Harris
f8ad1b3db8 Improved IEU and bitmanip test coverage 2023-03-23 14:24:41 -07:00
Kevin Kim
e5be0bd2fd started bitmanip alu modularization 2023-03-23 14:02:28 -07:00
David Harris
99c471ccfe Added csrwrites.S test case for privileged tests 2023-03-23 10:55:32 -07:00
Kevin Kim
bfaf646ed2 Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip 2023-03-22 10:34:19 -07:00
Kevin Kim
cd50018087 remove outdated 2023-03-22 10:34:17 -07:00
Kevin Kim
605f41cd55
Merge branch 'openhwgroup:main' into bit-manip 2023-03-22 10:33:15 -07:00
Kevin Kim
b3fbdba7f3 updated header comments to indicate chapter 15 2023-03-22 10:31:21 -07:00
Kevin Kim
c197a040c8 remove helper python script 2023-03-22 10:27:59 -07:00
Kevin Kim
b9b8023674 formatting 2023-03-22 10:26:04 -07:00
Kevin Kim
bc2bbc0529 min/max mux optimize 2023-03-22 10:25:54 -07:00
Kevin Kim
80a490888a formatting 2023-03-22 10:14:12 -07:00
eroom1966
1c3c8be148 support linux 2023-03-22 17:10:32 +00:00
David Harris
c4c7f5378e Select original compressed or uncompressed instruction for MTVAL on illegal instruction fault 2023-03-22 06:29:30 -07:00
David Harris
32c54db595 Fix Issue #142: SCOUNTEREN powers up at 1 instead of 0 2023-03-22 04:41:57 -07:00
David Harris
77fb1b57f4 Fix Issue 145 2023-03-22 04:33:14 -07:00
Kevin Kim
2e149f9a31 Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip 2023-03-21 11:20:05 -07:00
David Harris
376bbcc71d Renamed intdivrestoring to div 2023-03-21 05:51:02 -07:00
David Harris
0fd385e5de Renamed intdivrestoring to div 2023-03-20 16:22:06 -07:00
Kevin Kim
73fbc21aab formatting 2023-03-20 14:25:05 -07:00
Kevin Kim
37b73ea42e more structural mux changes 2023-03-20 14:23:54 -07:00
Kevin Kim
7a6d1ab393 added bitmanip 64 tests to updated regression script 
+ alu structural mux changes
 2023-03-20 14:19:39 -07:00
Kevin Kim
728be29ce3 formatting 2023-03-20 13:09:49 -07:00
Kevin Kim
07a43e1935 Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip 2023-03-20 13:06:10 -07:00
David Harris
0ecde4ab4f formatting cleanup 2023-03-20 12:45:10 -07:00
Kevin Kim
9e5360e31f format + min/max structural mux 2023-03-20 09:37:57 -07:00
David Harris
471305bda0 Eliminate transitions to FLUSH and WRITEBACK in cachefsm for READ_ONLY_CACHE 2023-03-19 10:41:47 -07:00
David Harris
835381a122 Removed flq from LLEN=64 2023-03-19 10:25:04 -07:00
David Harris
02e7e7d011 Added comments about PMP checker fixes when test cases will be ready to initialize PMP before entering user mode 2023-03-19 05:46:34 -07:00
David Harris
031cc6967a Fix Issue #120 about SIE/SIP being 0 unless MIDELEG bits are set. However, this fix breaks the wally32/64priv tests in regression. 2023-03-18 10:10:58 -07:00
David Harris
70e4c71f41 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-18 09:24:37 -07:00
David Harris
08ce265420 Replaced FenceM with InvalidateICacheM for event counting of fence.i 2023-03-18 09:24:31 -07:00
Ross Thompson
407b3c488d Book updates. 2023-03-14 13:09:50 -05:00
Ross Thompson
a27051b8a8 Updated NextAdr to NextSet. 2023-03-13 14:54:13 -05:00
Ross Thompson
cb019f9aed Updated CAdr to CacheSet. 2023-03-13 14:53:00 -05:00
Ross Thompson
ede9d49ce4 Changes BTA to BPBTA. 2023-03-12 14:36:46 -05:00
Ross Thompson
e233b63752 Replaced DCACHE parameter with READ_ONLY_CACHE as the name was confusing in chapter 10. 2023-03-12 13:21:22 -05:00
Kevin Kim
bc9cd4a26e more checks in bitmanip decode 2023-03-10 17:17:24 -08:00
Kevin Kim
869c7283e8 formatting 2023-03-10 14:32:01 -08:00
Kevin Kim
827cf567e6 removed redundant convinvb signal 2023-03-10 14:18:24 -08:00
Kevin Kim
a5841c6fb2 removed redundant condinvb mux 2023-03-10 14:17:38 -08:00
David Harris
ed22433916 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-10 12:47:30 -08:00
David Harris
2614448218 Simplified SLT and SLTU code in ALU 2023-03-09 15:14:52 -08:00
Kevin Kim
6ee15c6e2c more comprehensive illegal b instr. check 2023-03-09 12:44:51 -08:00
Kevin Kim
5853854f52 fixed bmu bug 
- accidentally deleted count instruction decode
 2023-03-09 12:35:42 -08:00
Ross Thompson
fa8a550e12 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-09 13:29:38 -06:00
Kevin Kim
ba13f6794e Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip 2023-03-08 16:22:47 -08:00
Kevin Kim
2175702f6d cleaner bmu decode logic 2023-03-08 16:22:43 -08:00
Ross Thompson
6d2d7d181e Updated testbench to record coremark performance counters. 
Added comment about mtval probably not being correct for compressed instructions.
 2023-03-08 17:11:27 -06:00
kipmacsaigoren
10e0935207
Merge branch 'openhwgroup:main' into bit-manip 2023-03-07 21:29:03 -08:00
David Harris
ec0873ff16 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-07 14:49:23 -08:00
Kevin Kim
f2090d25c4
Merge branch 'bit-manip' into illegal_specific 2023-03-07 14:07:59 -08:00
Kevin Kim
8eb4eb2100
Merge branch 'openhwgroup:main' into illegal_specific 2023-03-07 14:06:22 -08:00
Kevin Kim
20af58cdd4 alu formatting 2023-03-07 14:01:47 -08:00
Kevin Kim
b33b0afc77 specifc instruction handling for B's 
- Added BALUSrcBD, BaseALUSrcB for distinguishing between base instruction I/IW and Bitmanip instruction I/IW
 2023-03-07 13:58:08 -08:00
kipmacsaigoren
01f78835cb
Merge branch 'openhwgroup:main' into priv-tests 2023-03-07 13:46:55 -08:00
Kip Macsai-Goren
1ceaaad592 Merge remote-tracking branch 'upstream/main' into bit-manip 2023-03-07 13:45:04 -08:00
Kip Macsai-Goren
47bbe72d1f Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-07 13:44:51 -08:00
Kip Macsai-Goren
34c0f86d37 Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-07 13:44:19 -08:00
Kevin Kim
3b874b964f Merge remote-tracking branch 'origin' into illegal_specific 2023-03-07 11:30:36 -08:00
Kevin Kim
dc456415c1 formatting 2023-03-07 10:57:52 -08:00
Kevin Kim
7ec33ca094 shifter sign generation logic optimize 2023-03-07 10:57:06 -08:00
David Harris
dce6d33531 editorconfig to specify tabs/spaces. Fixed some tabs. Turn off coverage to speed up simulation 2023-03-07 06:31:40 -08:00
Kevin Kim
7651d41c90 reverted backing to working version 2023-03-07 00:29:58 -08:00
Kevin Kim
8c20d67659 reverted to working version 2023-03-07 00:28:07 -08:00
Ross Thompson
17f80285ca Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 22:29:27 -06:00
Ross Thompson
b8dca927f2 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 18:39:15 -06:00
Ross Thompson
4b539de184 Renamed signals to be consistent with textbook. 2023-03-06 18:29:31 -06:00
Ross Thompson
6fc157e628 Renamed PCFSpill to PCSpillF. 2023-03-06 17:50:57 -06:00
Ross Thompson
e831efddaf Renamed InstrFirstHalf to InstrFirstHalfF. 2023-03-06 17:48:57 -06:00
Ross Thompson
82ada79b11 Renamed ebuarbfsm to ebufsmarb to match figures. 2023-03-06 17:47:55 -06:00
David Harris
4fd461e520 Fixed bug about rv64 shifts only using 6 bits of funct7 2023-03-06 13:10:51 -08:00
David Harris
94dd39795e Simplified decoder default to illegal instruction 2023-03-06 11:21:11 -08:00
David Harris
08f1ed8e53 More detailed decoding of load/store/branch/jump 2023-03-06 11:15:48 -08:00
David Harris
a01e0bd318 Improved decoding illegal instructions in controller 2023-03-06 11:02:42 -08:00
Kevin Kim
4a31ab1bc3 structural changes in cnt.sv 2023-03-06 06:44:15 -08:00
Kevin Kim
45697f050d formatting 2023-03-06 06:20:25 -08:00
Kevin Kim
c38a5d9151 formatting 
- reverted back to ALUResult signal in alu.sv
 2023-03-06 06:19:01 -08:00
Kevin Kim
474b69967a formatted files 2023-03-06 05:52:08 -08:00
Kevin Kim
288c7ad48c updated license header 2023-03-06 05:41:53 -08:00
Kevin Kim
cec1e89c78 bug fix 2023-03-05 15:20:48 -08:00
Kevin Kim
19beed7866 extend unit structural mux 2023-03-05 15:09:02 -08:00
Kevin Kim
7531bf1fd6 zbb result select mux structural 2023-03-05 14:57:30 -08:00
Kevin Kim
3656d42ac0 zbc input mux structural 2023-03-05 14:26:31 -08:00
Kevin Kim
869e812aa8 revA signals to cnt, zbb 2023-03-05 14:26:24 -08:00
Kevin Kim
0e6ea0ee60 ALU changes 
- added PreShiftAmt signal for shadd
- condinvB now muxes from B instead of mask
 2023-03-05 14:06:24 -08:00
Kevin Kim
3d5ee8d964 bug in bctrl 
- deleted the min/minu decoding for some reason.
 2023-03-04 23:56:33 -08:00
Kevin Kim
6ead150cb1 BSelect from OH encoding to Binary 2023-03-04 23:19:31 -08:00
Kevin Kim
4b1ee5a196 alu pre-shift 
-changed ALU pre shift logic to use a 2 bit shifter instead of mux
 2023-03-04 23:07:06 -08:00
Kevin Kim
b0f152de28 added python script 
-I've been using this python script to make quick changes to the bitmanip controller
 2023-03-04 22:54:32 -08:00
Kevin Kim
499c3c5c30 Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip 2023-03-04 22:44:09 -08:00
Kevin Kim
6295178073 removed rotate signal in datapath and instead packed into the new BALUControl Signal 
- BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU
 2023-03-04 22:44:03 -08:00
Kip Macsai-Goren
0ba1a59a70 added reset values to stime and stimecmp registers 2023-03-04 15:06:15 -08:00
Kip Macsai-Goren
e76e7120c0 Merge remote-tracking branch 'upstream/main' into bit-manip 2023-03-04 14:43:12 -08:00
Kevin Kim
b6dd855395 zbc result mux is now structural 2023-03-04 09:22:21 -08:00
Kevin Kim
6e52113208 Rotate signal now gets generated in bmu ctrl 2023-03-03 22:57:49 -08:00
Kevin Kim
18ab538a5e license comments 2023-03-03 21:52:34 -08:00
Kevin Kim
efce306aab removed redundant signals in controller 2023-03-03 21:52:25 -08:00
Kevin Kim
448e950eba b controller generates comparison signed flag and controller branch signed logic updated accordingly 2023-03-03 17:12:29 -08:00
Ross Thompson
dea5aae01e
Merge pull request #126 from davidharrishmc/dev 
ImperasDV setup
 2023-03-03 18:01:32 -06:00
David Harris
39c871ee0c Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-03 15:54:42 -08:00
Kevin Kim
0bb75132c6 sltD signal debug. Passes regression 2023-03-03 12:44:33 -08:00
Kevin Kim
d24f74dc4b sltD logic optimize 2023-03-03 12:35:40 -08:00
Kevin Kim
66b15b9163 Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate 2023-03-03 09:54:08 -08:00
Kevin Kim
0dee48fa5c
Merge branch 'openhwgroup:main' into bctrlmigrate 2023-03-03 09:53:59 -08:00
Kevin Kim
77c9114bcc removed outdated b-signals in controller 2023-03-03 08:45:42 -08:00
Kevin Kim
2b9a6aba91 comments to bctrl 2023-03-03 08:41:47 -08:00
Kevin Kim
11f165d1bb migrated B-subarith logic into b controller 2023-03-03 08:40:29 -08:00
Kevin Kim
b5a5f364e1 began subarith configurability optimization in controller 2023-03-03 08:27:11 -08:00
Ross Thompson
7dd8fa16c1 Renamed BTB misprediction to BTA. 2023-03-03 00:18:34 -06:00
Ross Thompson
bdab2c8506 Added divide cycle counter. 2023-03-02 23:59:52 -06:00
Ross Thompson
4b501f6e03 Added the i and d cache cycle counters. 2023-03-02 23:54:56 -06:00
Ross Thompson
b19d51b6a2 Added fence counter. 2023-03-02 23:29:20 -06:00
Ross Thompson
3dbfa96aef Added csr write counter, sfence vma counter, interrupt counter, and exception counter. 2023-03-02 23:21:29 -06:00
Ross Thompson
cf4d8e6bd0 Added store stall to performance counters. 2023-03-02 23:10:54 -06:00
Ross Thompson
e257ec96ac Reordered performance counters and added space for new ones. 2023-03-02 23:04:31 -06:00
David Harris
d51d93a3a8 Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt) 2023-03-02 20:00:47 -08:00
Kevin Kim
f4b8968e12 bug fix, more elegant logic changes in controller 2023-03-02 16:00:56 -08:00
Kevin Kim
2a0c59d5a7 formatting 2023-03-02 15:28:43 -08:00
Kevin Kim
d0c486df54 removed main instruction decoder dependence on bmu controller 2023-03-02 15:28:33 -08:00
Kevin Kim
11a977ffe3 added bitmanip illegal instruction signal 2023-03-02 15:09:55 -08:00
Kevin Kim
b52208b539 zbc comments 2023-03-02 13:52:00 -08:00
Kevin Kim
2d7d143f6d formatted bmu decoder 2023-03-02 13:45:15 -08:00
Kevin Kim
1b222f91be moved ALUControlD into configurable block 2023-03-02 12:17:03 -08:00
Kevin Kim
1e1ecaafb1 moved SubArith and RegWriteE into configurable block 2023-03-02 12:15:57 -08:00
Kevin Kim
7dd4a2e975 added BRegWriteE signal 2023-03-02 12:15:22 -08:00
Kevin Kim
d40f3b2a1c rename shifternew to shifter 2023-03-02 11:45:32 -08:00
Kevin Kim
905373d53b zbc input select mux optimize 2023-03-02 11:43:05 -08:00
Kevin Kim
2bfbf051a5 zbc select mux optimization 2023-03-02 11:40:29 -08:00