forked from Github_Repos/cvw
Query about CondExtA
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@ -52,9 +52,9 @@ module alu #(parameter WIDTH=32) (
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logic LT, LTU; // Less than, Less than unsigned
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logic Asign, Bsign; // Sign bits of A, B
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// A, A sign bit muxes
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// *** explain this part better; possibly move into shifter and BMU?
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if (WIDTH == 64) begin
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mux3 #(64) extendmux({{32{1'b0}}, A[31:0]},{{32{A[31]}}, A[31:0]}, A, {~W64, SubArith}, CondExtA); // bottom 32 bits are always A[31:0], so effectively a 32-bit upper mux
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mux3 #(64) extendmux({{32{1'b0}}, A[31:0]}, {{32{A[31]}}, A[31:0]}, A, {~W64, SubArith}, CondExtA); // bottom 32 bits are always A[31:0], so effectively a 32-bit upper mux
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end else begin
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assign CondExtA = A;
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end
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