Commit Graph

114 Commits

Author SHA1 Message Date
Katherine Parry
4177f4f148 Updated FMA 2021-06-14 13:42:53 -04:00
David Harris
49b5fa3994 Reverted MIDELEG and MEDELEG to XLEN so busybear passes 2021-06-10 23:47:32 -04:00
bbracker
d4aeb1c387 merge 2021-06-10 10:03:01 -04:00
bbracker
0321d74562 attempt to fix regression by adding PMP_ENTRIES to configs 2021-06-10 09:59:26 -04:00
David Harris
3e8026dc21 Configurable number of performance counters 2021-06-10 09:41:26 -04:00
David Harris
0ffbd03139 More verilator fixes, but bpred is broken 2021-06-09 21:03:03 -04:00
David Harris
c7e57aeb1a removed verilator lint_off WIDTH 2021-06-09 21:01:44 -04:00
David Harris
2952550db7 More PMP entries 2021-06-08 15:33:06 -04:00
David Harris
90e5781471 Start to parameterize number of PMP Entries 2021-06-08 15:29:22 -04:00
Kip Macsai-Goren
a95a7a7b82 working version with new mmu comments, old boottim values 2021-06-08 15:20:25 -04:00
David Harris
b613f46c2d Resized BOOT TIM to 1 KB 2021-06-08 14:04:32 -04:00
David Harris
2ae5ca19b5 Continued merge 2021-06-07 12:49:47 -04:00
David Harris
ff62000e2c Second attept to commit refactoring config files 2021-06-07 12:37:46 -04:00
David Harris
dc0b19dfaa Merge difficulties 2021-06-07 09:50:23 -04:00
David Harris
d5ec797ba4 Refactored configuration files and renamed testbench-busybear to testbench-linux 2021-06-07 09:46:52 -04:00
Kip Macsai-Goren
22e8e06ac7 moved privilege dfinitions into wally-constants, upgraded relevant includes 2021-06-04 17:55:07 -04:00
David Harris
a26bf37be8 Started MMU 2021-06-04 11:59:14 -04:00
David Harris
4f71964529 Fixed RV32 MMU constants 2021-06-04 09:15:42 -04:00
David Harris
0674f5506e moved shared constants to a shared directory 2021-06-03 22:41:30 -04:00
Kip Macsai-Goren
40cfa86935 Edited and added constants to support SV48 2021-06-01 17:49:45 -04:00
James E. Stine
2eeb12c674 Updates to muldiv.sv for 32-bit div/rem 2021-06-01 15:31:07 -04:00
Ross Thompson
ab509614bb Changed to bp config to use gshare. 2021-06-01 12:14:58 -05:00
Ross Thompson
857f59ab5c Now have global history working correctly. 2021-06-01 10:57:43 -05:00
Ross Thompson
8a035104ac It's a bit sloppy, but the global history predictor is working correctly now.
There were two major bugs with the predictor.
First the update mechanism was completely wrong.  The PHT is updated with the GHR that was used to lookup the prediction.  PHT[GHR] = Sat2(PHT[GHR], branch outcome).
Second the GHR needs to be updated speculatively as the branch is predicted.  This is important so that back to back branches' GHRs are not the same.  The must be different to avoid aliasing.  Speculation of the GHR update allows them to be different.  On mis prediction the GHR must be reverted.
This implementation is a bit sloppy with names and now the GHR recovery is performed.  Updates to follow.
2021-05-27 23:06:28 -05:00
James E. Stine
c89d3e01bb Update to rv64icfd wally-config to run through FP tests 2021-05-21 09:22:17 -05:00
Katherine Parry
06af239e6c FMV.D.X imperas test passes 2021-05-20 22:17:59 -04:00
James E. Stine
44dc665fc5 Mod to config to properly add FP stuff - for icfd test. Should not change regression test through Imperas as just mod to testbench (add tests64d/tests64f but remove from MISA) 2021-05-18 13:48:44 -05:00
Katherine Parry
9464c9022d floating point infinite loop removed from imperas tests 2021-05-18 10:42:51 -04:00
Elizabeth Hedenberg
170f072b52 pushing coremark to main branch 2021-05-11 21:33:39 -04:00
Shriya Nadgauda
c5a306426a finishing merge conflict changes 2021-05-03 22:15:05 -04:00
Shriya Nadgauda
b7159652f6 merge conflict fixes 2021-05-03 22:12:30 -04:00
Shriya Nadgauda
968994c04a updated pipeline tests 2021-05-03 22:07:36 -04:00
Elizabeth Hedenberg
2d1d929485 coremark print statment 2021-05-03 19:35:08 -04:00
Ross Thompson
7f38056879 fixed subtle typo in icache fsm. Was messing up hit spill hit.
I believe the mibench qsort benchmark runs after this icache fix.
2021-05-03 16:55:36 -05:00
bbracker
1fcd43e844 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-04-30 06:26:35 -04:00
bbracker
182bfdbb0e rv32 plic test and lint fixes 2021-04-30 06:26:31 -04:00
Ross Thompson
818c0abc89 Fixed memory size in configs for rv32ic and rv64ic.
Removed warning on call to $fscanf.
2021-04-29 17:36:46 -05:00
Ross Thompson
72363f5c66 Added the ability to exclude branch predictor. 2021-04-26 14:27:42 -05:00
Ross Thompson
8e5409af66 Icache integrated!
Merge branch 'icache-almost-working' into main
2021-04-26 11:48:58 -05:00
Ross Thompson
6e803b724e Merge branch 'tests' into icache-almost-working 2021-04-25 21:25:36 -05:00
bbracker
a3487a9e47 do script refactor 2021-04-24 09:32:09 -04:00
bbracker
74b35ac57a greatly improved PLIC register interface 2021-04-22 11:22:01 -04:00
Noah Boorstin
3f0ead9d4e yay buildroot passes a decent amount of tests now
gets through the first 15k instructions, that's good enough for now
also slight change to string parsing in busybear testbench
2021-04-19 03:26:08 -04:00
Noah Boorstin
6954e6df4c buildroot: sim is now running!
yes it only gets through 5 instructions right now. Yes that's my fault.
2021-04-17 14:44:32 -04:00
Noah Boorstin
4f97e9e761 start to add buildroot testbench
This still uses testbench-busybear.sv
I think it might be time to finally rename nearly 'busybear' thing to 'linux'
2021-04-16 23:27:29 -04:00
bbracker
290b3424e5 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-04-15 21:09:27 -04:00
bbracker
368c94d4ff working GPIO interrupt demo 2021-04-15 21:09:15 -04:00
Domenico Ottolia
92bb38fa8c Add support for vectored interrupts 2021-04-15 19:13:42 -04:00
Shreya Sanghai
0369fc5d1e Cherry Pick merge of Shreya's localhistory predictor changes into main.
fixed minor bugs in localHistory
2021-04-15 09:04:36 -05:00
Shreya Sanghai
7e9a0602ea fixed bugs in global history to read latest GHRE
Cherry pick Shreya's commits into main branch.
2021-04-15 08:55:22 -05:00