Update to rv64icfd wally-config to run through FP tests

wally-pipelined/config/rv64icfd/wally-config.vh

@@ -31,7 +31,7 @@
 `define XLEN 64
 
 // MISA RISC-V configuration per specification
-`define MISA (32'h00000104 | 0 << 5 | 0 << 3 | 1 << 18 | 1 << 20 | 1 << 12 | 1 << 0)
+`define MISA (32'h00000104 | 0 << 5 | 1 << 3 | 1 << 18 | 1 << 20 | 1 << 12 | 1 << 0)
 `define A_SUPPORTED ((`MISA >> 0) % 2 == 1)
 `define C_SUPPORTED ((`MISA >> 2) % 2 == 1)
 `define D_SUPPORTED ((`MISA >> 3) % 2 == 1)
@@ -73,7 +73,8 @@
 `define BOOTTIMBASE   32'h00000000
 `define BOOTTIMRANGE  32'h00003FFF
 `define TIMBASE    32'h80000000
-`define TIMRANGE   32'h0007FFFF
+// `define TIMRANGE   32'h0007FFFF
+`define TIMRANGE   32'h07FFFFFF
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
 `define GPIOBASE   32'h10012000
@@ -86,7 +87,7 @@
 // Test modes
 
 // Tie GPIO outputs back to inputs
-`define GPIO_LOOPBACK_TEST 0
+`define GPIO_LOOPBACK_TEST 1
 
 // Busybear special CSR config to match OVPSim
 `define OVPSIM_CSR_CONFIG 0
@@ -94,6 +95,13 @@
 // Hardware configuration
 `define UART_PRESCALE 1
 
+// Interrupt configuration
+`define PLIC_NUM_SRC 4
+// comment out the following if >=32 sources
+`define PLIC_NUM_SRC_LT_32
+`define PLIC_GPIO_ID 3
+`define PLIC_UART_ID 4
+
 /* verilator lint_off STMTDLY */
 /* verilator lint_off WIDTH */
 /* verilator lint_off ASSIGNDLY */

wally-pipelined/testbench/testbench-imperas.sv

@@ -135,7 +135,7 @@ string tests32f[] = '{
     // "rv64d/I-FCVT-WU-D-01", "2000",
     // "rv64d/I-FDIV-D-01", "2000",
     // "rv64d/I-FEQ-D-01", "2000",
-    // "rv64d/I-FLD-D-01", "2000",
+    //"rv64d/I-FLD-D-01", "2000",
     // "rv64d/I-FLE-D-01", "2000",
     // "rv64d/I-FLT-D-01", "2000",
     // "rv64d/I-FMADD-D-01", "2000",