Rose Thompson
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db3a7d5bbd
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More code cleanup for CacheSim.py
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2024-11-13 10:45:33 -06:00 |
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Rose Thompson
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77d47e531f
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Merge branch 'main' into lrufixes
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2024-11-13 10:34:21 -06:00 |
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Rose Thompson
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2fe73f8174
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Replaced double | and & with single. We were having issues with these verilator giving a warning about the parameter widths not matching. However the warning is not occuring anymore.
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2024-11-13 00:02:51 -06:00 |
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Rose Thompson
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8993432928
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Resolved issue with questa not liking the TEST +arg as a generate.
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2024-11-12 23:57:30 -06:00 |
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Rose Thompson
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ef7072b7c2
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Merge branch 'main' into lrufixes
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2024-11-12 17:57:28 -06:00 |
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Rose Thompson
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5346680758
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Final code cleanup.
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2024-11-12 17:52:16 -06:00 |
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Rose Thompson
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b8cafb5198
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More code cleanup.
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2024-11-12 17:51:22 -06:00 |
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Rose Thompson
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7868af0f81
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Code cleanup.
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2024-11-12 17:43:09 -06:00 |
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Rose Thompson
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8659d6efdb
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Resolved all CacheSim.py vs Wally mismaches.
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2024-11-12 17:24:06 -06:00 |
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Rose Thompson
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d5e8ecbed5
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Simplified the fpgatop SDCCLK logic.
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2024-11-12 15:29:05 -06:00 |
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Rose Thompson
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f7270763a6
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Merge branch 'main' of github.com:rosethompson/cvw
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2024-11-12 15:06:57 -06:00 |
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Rose Thompson
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5afe634da5
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Merge branch 'openhwgroup:main' into main
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2024-11-12 15:05:03 -06:00 |
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Rose Thompson
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57fbd35484
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Fixed lint errors in loggers.sv with Kaitlin.
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2024-11-12 15:03:30 -06:00 |
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Rose Thompson
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ea2b69e1e7
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Updates to wavefile.
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2024-11-12 14:44:09 -06:00 |
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Rose Thompson
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383fce5522
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Fixed the issue with cbo.clean.
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2024-11-12 14:38:44 -06:00 |
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Rose Thompson
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b7b7c79726
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CBO.FLUSH was not clearing the valid bit if the cacheline was clean.
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2024-11-12 14:16:55 -06:00 |
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Rose Thompson
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5cc1fd4a85
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Getting closer. Oly the wally64priv tests mismatch between the cachesim and wally.
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2024-11-12 12:08:14 -06:00 |
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Rose Thompson
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8a4868ac57
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Resolved a bug in the cache but there are still mismatches with the cache simulator.
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2024-11-12 11:35:29 -06:00 |
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Rose Thompson
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0cf7b2e45a
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Progress on fixing the cache simulator to support cbo instructions.
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2024-11-11 16:37:17 -06:00 |
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Rose Thompson
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3137fd7db2
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Resolved some of the issues with the cache simulator mismatching with Wally. The LRU was incorrectly updating it's state while the cache was stalled causin g the LRU state to be update when it should not be.
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2024-11-11 14:23:58 -06:00 |
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David Harris
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848c5feda7
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Merge pull request #1083 from jordancarlin/verilator_assertions
Enable assertions in Verilator
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2024-11-11 06:13:09 -08:00 |
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Jordan Carlin
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c776ef3fd4
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enable assertions in Verilator
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2024-11-10 22:20:51 -08:00 |
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David Harris
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f597eb8eec
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Merge pull request #1081 from jordancarlin/linux_tv_gen_cleanup
Use objcopy to fix linux testvector byte order
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2024-11-10 14:59:47 -08:00 |
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Jordan Carlin
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24af6bba51
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Merge branch 'main' of https://github.com/openhwgroup/cvw into linux_tv_gen_cleanup
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2024-11-09 17:38:30 -08:00 |
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Jordan Carlin
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43d0510bc7
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Pad linux raw testvectors before reversing
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2024-11-09 17:32:43 -08:00 |
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Jordan Carlin
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5bbaf2d95d
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Remove bootmem.txt
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2024-11-09 17:01:55 -08:00 |
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Jordan Carlin
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80f3b94057
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Replace fixBinMem.c with objcopy
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2024-11-09 17:01:34 -08:00 |
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David Harris
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e829c801a9
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Merge pull request #1080 from jordancarlin/fix_gcc_update
Fix GCC not updated when install script rerun
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2024-11-09 05:18:33 -08:00 |
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Jordan Carlin
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e4e266fee0
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Fix GCC not updated when install script rerun
[skip ci]
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2024-11-08 17:49:44 -08:00 |
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Rose Thompson
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425da11157
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Merge pull request #1078 from jordancarlin/qemu_install
Don't clone QEMU submodules
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2024-11-08 15:07:04 -06:00 |
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Rose Thompson
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3146f7394e
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Merge pull request #1073 from naichewa/main
Correct some SPI Delay0 register behavior, simplify unneeded Delay0 logic
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2024-11-08 13:15:35 -06:00 |
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naichewa
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515e05ed75
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Merge branch 'openhwgroup:main' into main
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2024-11-08 11:07:29 -08:00 |
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naichewa
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396a17623b
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Fixed TransmitStart resetting SCK and delay counter while already counting
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2024-11-08 11:05:38 -08:00 |
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Jordan Carlin
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78bfa440a8
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Merge pull request #1079 from coreyqh/dev
Fixed Typo
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2024-11-08 10:14:36 -08:00 |
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Corey Hickson
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78fbb06962
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Fixed Typo
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2024-11-08 09:56:49 -08:00 |
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Jordan Carlin
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2fe8c48684
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Don't clone QEMU submodules
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2024-11-08 09:32:53 -08:00 |
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David Harris
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adc9123f61
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Merge pull request #1074 from unaimillan/fix/minor_typos
Fix minor typos in src/fpu/postproc.sv
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2024-11-08 07:47:32 -08:00 |
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David Harris
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5e217ce464
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Merge pull request #1077 from Zain2050/main
Enabled 'show_c_prefix' in imperas
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2024-11-08 07:47:15 -08:00 |
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Zain2050
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83b07a0d27
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enable show_c_prefix
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2024-11-08 07:12:44 -08:00 |
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Jordan Carlin
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3943d07827
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Merge pull request #1076 from openhwgroup/revert-1065-Z_enable
Revert "Enabling ZB and Zk extensions in coverage.svh of congif/rv32gc and congif/rv64gc"
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2024-11-07 17:04:42 -08:00 |
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David Harris
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18ddf1f77b
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Revert "Enabling ZB and Zk extensions in coverage.svh of congif/rv32gc and congif/rv64gc"
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2024-11-07 17:04:09 -08:00 |
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David Harris
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fe0938f5e1
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Merge pull request #1075 from jordancarlin/code_coverage
Code coverage improvements
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2024-11-07 16:35:50 -08:00 |
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Mike Kuskov
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e57473ece1
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Fix minor typos in src/fpu/postproc
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2024-11-08 02:23:44 +03:00 |
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Jordan Carlin
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6f496e0b93
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Remove unused fround coverage test
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2024-11-07 13:40:24 -08:00 |
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Jordan Carlin
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040d6269b5
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cover illegal aes64ksli1 instruction
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2024-11-07 13:40:24 -08:00 |
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Jordan Carlin
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4a14f80527
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Refactor coverage tests to use assembly instead of machine code where possible
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2024-11-07 13:40:24 -08:00 |
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Jordan Carlin
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85404bbc5b
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Cover write to TIME CSR
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2024-11-07 13:40:23 -08:00 |
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naichewa
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e59ca12cdc
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Merge branch 'main' of https://github.com/naichewa/cvw
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2024-11-07 12:14:28 -08:00 |
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naichewa
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987015a2a7
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Fix SPI Delay1 behavior
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2024-11-07 12:14:23 -08:00 |
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naichewa
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24509adea3
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Merge branch 'openhwgroup:main' into main
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2024-11-07 10:49:36 -08:00 |
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