Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-01-23 21:14:37 +00:00
Code Issues Packages Projects Releases Wiki Activity
10,493 Commits 4 Branches 2 Tags 52 MiB
c178180b0f
Commit Graph

76 Commits

Author SHA1 Message Date
Jordan Carlin
2b57633217
Switch to out of tree riscv-arch-test with VM tests + add pmp & vm tests to testbench 2024-11-15 22:52:21 -08:00
Jordan Carlin
4092f27b07
Fix bit-width of memfile for rv64 riscv-arch-test floating point tests 2024-09-29 17:24:08 -07:00
Jordan Carlin
68b854fc20
Finish updating riscof and sim Makefiles to allow targets to run in parallel 2024-09-29 14:05:28 -07:00
Huda-10xe
b315a8e338 Adding regression commands to Makefile 2024-08-21 15:45:23 +05:00
Jordan Carlin
895e259a95
Set riscof jobs based on number of cores 2024-08-15 19:02:48 -07:00
Huda-10xe
0303314f4e Adding RVVI Functional Coverage Support 2024-08-07 14:31:16 +05:00
James Stine
f660779ba9 Fix for Q causing it to error out - commented out line for ISA and reset-val so can be put back 2024-06-28 12:17:15 -05:00
David Harris
21e5fa3103
Merge pull request #854 from Shreesh-Kulkarni/main 
Files for Quad Precision Testing Support for Wally
 2024-06-26 11:41:26 -07:00
Shreesh-Kulkarni
93fb0f2a84 Files for Quad Precision Testing Support for Wally 2024-06-26 11:36:04 -07:00
David Harris
0fcc7878dc Updated march lists 2024-06-25 21:54:58 -07:00
David Harris
e667adf946 Added covergen directed coverage generator 2024-05-01 14:47:37 -07:00
David Harris
b7e66ec7d6 Added Zcb tests to riscof 2024-04-20 13:17:33 -07:00
Jordan Carlin
6ef6bc042d
Update RISCOF ISA config MISA values to be consistent 2024-04-06 18:18:50 -07:00
David Harris
9ff9f9e0ae Updated wally-riscv-arch-test to be able to compile zfh and zfa tests. This caused a change in startup code, so certain reference_output results needed to change to compensate. Also commented out fcvtmod test in Zfa that fails because Sail produces the wrong expected value. 2024-03-14 19:03:57 -07:00
David Harris
5e3ff3e871
Merge pull request #671 from Karl-Han/increase_riscof_jobs 
Increase number of jobs in riscof to speedup building.
 2024-03-13 14:52:05 -07:00
Kunlin Han
b5419ccfc9 Increase number of jobs in riscof to speedup building. 2024-03-13 12:28:30 -07:00
Rose Thompson
3cf6a19729
Merge branch 'main' into main 2024-03-10 10:48:21 -05:00
Rose Thompson
24dffa39d5 Yay. David and I got our first Quad load/store instructions working! 2024-03-07 12:48:52 -06:00
KelvinTr
01c45ab9d7 Fixed K extension changes 2024-02-28 17:05:08 -06:00
James E. Stine
0d4d996655 add spike riscof items for K extension test 2024-02-24 22:43:33 -06:00
David Harris
9260d3c424 Add Zfh support to imperas.ic, use Zicond in riscof now that it is fixed in riscv-arch-test 2024-01-18 22:46:07 -08:00
David Harris
17c9be7695 Cleanup typos, remove Zicond from riscof until it is working 2024-01-18 21:36:52 -08:00
David Harris
9eb6d9c8b8 Added Zicond support 2024-01-11 07:37:15 -08:00
David Harris
d36b6e919a Fixed missing Zba ISA string from spike_rv64gc_isa.yaml for RISCOF 2024-01-09 10:00:06 -08:00
David Harris
ed623f1a71 Fixed unsupported riscof YAML string; preparing for Verilator -G testcase 2024-01-05 20:06:21 -08:00
David Harris
52b6d1d163 restored tlbNAPOT coverage tests 2023-12-31 09:55:58 -08:00
David Harris
d130a78616 Updated to current version of toolchain and prepare to be able to compile Zcb and Zicboz when supported 2023-12-20 16:29:03 -08:00
David Harris
a138ef37b1 Switched to using riscv-arch-test rv32e_m suite. Need to rename it from rv32e_unratified (PR pending) 2023-12-15 19:26:50 -08:00
David Harris
38f4d9baf8 Use riscv-arch-test arch32e instead of outdated wally-riscv-arch-test wally32e 2023-12-15 05:05:53 -08:00
David Harris
0f0b4b0c1c Added make wally-riscv-arch-test to tests/riscof to only build custom tests 2023-12-06 07:19:12 -08:00
David Harris
2b2016271a repo cleanup and start to add CMO tests 2023-11-20 23:41:36 -08:00
David Harris
434d6b2c5c minfo test working again with mconfigptr for RV64 2023-10-15 06:41:52 -07:00
David Harris
b4c9998b26 Increased timeout for riscof because it is so slow 2023-05-23 15:37:09 -07:00
David Harris
0cc8f9fd15 Fixed riscof scripts that were removing zicsr from compiler misa 2023-05-14 04:19:08 -07:00
David Harris
67a089104c Defined empty RVMODEL interrupt macros to make riscof warnings go away 2023-05-14 03:36:28 -07:00
Kip Macsai-Goren
44b5e234bd Removed unused ISA string from spike YAML 2023-03-22 13:23:52 -07:00
Kip Macsai-Goren
ba3bfdf68b Manual attempt to merge with upstream changes 2023-02-22 19:42:30 -08:00
Kip Macsai-Goren
0339dc5e78 added extra commands to make dut run work with spike for bit manip tests 2023-02-21 15:26:47 -08:00
Kip Macsai-Goren
ea38e05773 fixed makefile for 32 bit arch tests, restored original make for all others 2023-02-17 09:57:56 -08:00
Kip Macsai-Goren
7344f3ef30 Modified arch64 tests to remove floating point and double tests from hanging make 2023-02-17 09:51:55 -08:00
Kevin Kim
4fed8d9196 added critical rsync command to python script and builds I-ext tests 
-rsync copies the stuff from riscof_work to work/riscv-arch-test
-
 2023-02-14 10:40:29 -08:00
Kevin Kim
5fed4c2c87 updated python script to generate bash file 2023-02-11 11:08:11 -08:00
Kevin Kim
7e4fc40dc7 changed python file to use WALLY env variable 2023-02-11 00:30:56 +00:00
Kip Macsai-Goren
76593cb282 Added necessary files to make bit make and run bit manipulation tests as part of regression 2023-02-10 10:35:19 -08:00
David Harris
37ba3d0fcd Removed f tests from rv32e 2023-01-27 06:15:20 -08:00
David Harris
7fbbed7927 Update riscof makefile to use rv32gc config 2023-01-27 05:57:58 -08:00
David Harris
b81b5781e1 Renamed spike_rv32imc_isa.yaml to rv32gc to reflect cases tested 2023-01-27 05:56:49 -08:00
David Harris
7d8a0d9615 Refactored setup QUESTA and SNPS paths, and removed troublesome bit manipulation test cases 2023-01-23 05:00:11 -08:00
David Harris
b173112f86 Continued framework for B instructions 2023-01-20 14:27:13 -08:00
David Harris
ca949f2110 Only delegated bits of SIP are readable 2022-12-21 12:32:49 -08:00