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https://github.com/openhwgroup/cvw
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Increased timeout for riscof because it is so slow
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@ -130,4 +130,5 @@ class sail_cSim(pluginTemplate):
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make.add_target(execute)
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# make.execute_all(self.work_dir)
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# DH 7/26/22 increase timeout so sim will finish on slow machines
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make.execute_all(self.work_dir, timeout = 1800)
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# DH 5/17/23 increase timeout to 3600 seconds
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make.execute_all(self.work_dir, timeout = 3600)
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@ -191,7 +191,8 @@ class spike(pluginTemplate):
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# parallel using the make command set above.
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#make.execute_all(self.work_dir)
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# DH 7/26/22 increase timeout to 1800 seconds so sim will finish on slow machines
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make.execute_all(self.work_dir, timeout = 1800)
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# DH 5/17/23 increase timeout to 3600 seconds
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make.execute_all(self.work_dir, timeout = 3600)
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# if target runs are not required then we simply exit as this point after running all
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