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153 Commits

Author SHA1 Message Date
David Harris
c0afb44ed4 Tied dangling signals to 0 for some configs to make VCS lint happy 2024-04-28 22:50:36 -07:00
David Harris
3f195884e9 Defined bit sizes more precisely to help VCS lint and conform to coding style 2024-04-21 08:40:11 -07:00
David Harris
fc158689ad Shared amoalu max/min comparator hardware and removed input sign extend muxes 2024-03-24 17:15:46 -07:00
David Harris
f0b29d3083 AMO max/min comparator optimization 2024-03-24 17:05:32 -07:00
Kunlin Han
22b59138f0 Remove all #delay from non-testbench. 2024-03-16 11:20:32 -07:00
Kunlin Han
8c67a76912 Remove all #delay from non-testbench. 2024-03-13 10:31:40 -07:00
Rose Thompson
54c1d28c8b Fixed missing case in the align AccesByteOffset Mux. 2024-03-06 15:43:55 -06:00
Rose Thompson
0d8c251fa4 Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-03-06 15:35:34 -06:00
Rose Thompson
2f94be5e79 Revert "Optimized the align logic for loads." 
This reverts commit 1fd678b433.
 2024-03-06 15:19:17 -06:00
Rose Thompson
57aab52dc2 Revert "Partially working optimized subwordwrite for misaligned." 
This reverts commit dac8fc16af.
 2024-03-06 15:17:57 -06:00
Rose Thompson
9668fdd868 Revert "Closer to getting subword write misaligned working." 
This reverts commit 6a9c2d8dc4.
 2024-03-06 15:16:43 -06:00
Rose Thompson
dce7de59a3 Revert "Non-ideal fix. Added new output from pma which indicates if the write shift should occur." 
This reverts commit 3714b2bf4a.
 2024-03-06 15:16:37 -06:00
Rose Thompson
a48c16c0ef Revert "Swapped to the more compact subwordreadmisaligned.sv." 
This reverts commit 1ece6f8eae.
 2024-03-06 15:16:32 -06:00
Rose Thompson
f752b5dd37 Revert "Beginning subword cleanup." 
This reverts commit 7e1ea1e6d9.
 2024-03-06 15:16:24 -06:00
Rose Thompson
a8024eee26 Revert "Updated subword misaligned." 
This reverts commit 69d31d50e2.
 2024-03-06 15:16:16 -06:00
Rose Thompson
298028b119 Revert "Cleanup." 
This reverts commit 45c30267a5.
 2024-03-06 15:16:03 -06:00
Rose Thompson
739e73ef81 Revert "Siginficant cleanup of subwordwritemisaligned." 
This reverts commit fbc18abaa0.
 2024-03-06 15:15:58 -06:00
Rose Thompson
e7ec2bedd4 Revert "Simplifications of subword code." 
This reverts commit a402883115.
 2024-03-06 15:15:51 -06:00
Rose Thompson
b64b883129 Revert "Removed duplicate endianswap." 
This reverts commit caac48b7f2.
 2024-03-06 15:15:43 -06:00
Rose Thompson
5447159cfd Revert "Cleanup." 
This reverts commit e84b7cc147.
 2024-03-06 15:15:26 -06:00
Rose Thompson
2ea0134329 Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned." 
This reverts commit cba3209e7f.
 2024-03-06 13:28:59 -06:00
Rose Thompson
068ffda5fb Revert "Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned."" 
This reverts commit 8136b45ca7.
 2024-03-06 13:28:47 -06:00
David Harris
b386331cc8 Changed '0 to 0 where possible per Chapter 4 style guidelines 2024-03-06 05:48:17 -08:00
David Harris
86956026dc Further simplified subwordread muxing 2024-03-06 04:24:31 -08:00
Kevin Kim
9d73e5bd0d lsu supports quad enabled subwordreads 2024-03-05 17:07:39 -08:00
Rose Thompson
a22de45631 Removed unused storedelay from align. 2024-03-02 16:20:31 -06:00
Rose Thompson
8136b45ca7 Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned." 
This reverts commit cba3209e7f.
 2024-03-02 11:55:43 -06:00
Rose Thompson
cba3209e7f Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned. 2024-03-02 11:38:33 -06:00
Rose Thompson
ab750e150f Fixed lint errors for alignment. 2024-02-23 14:00:19 -06:00
Rose Thompson
e84b7cc147 Cleanup. 2024-02-23 13:00:21 -06:00
Rose Thompson
caac48b7f2 Removed duplicate endianswap. 2024-02-23 09:42:39 -06:00
Rose Thompson
a402883115 Simplifications of subword code. 2024-02-23 09:41:59 -06:00
Rose Thompson
fbc18abaa0 Siginficant cleanup of subwordwritemisaligned. 2024-02-22 14:17:15 -06:00
Rose Thompson
45c30267a5 Cleanup. 2024-02-22 14:08:04 -06:00
Rose Thompson
69d31d50e2 Updated subword misaligned. 2024-02-22 13:29:39 -06:00
Rose Thompson
7e1ea1e6d9 Beginning subword cleanup. 2024-02-22 09:37:16 -06:00
Rose Thompson
1ece6f8eae Swapped to the more compact subwordreadmisaligned.sv. 2024-02-22 09:34:16 -06:00
Rose Thompson
3714b2bf4a Non-ideal fix. Added new output from pma which indicates if the write shift should occur. 
The more ideal solution would be to have the pma indicate if the shift should occur and the maximum amount..
 2024-02-22 09:14:43 -06:00
Rose Thompson
6a9c2d8dc4 Closer to getting subword write misaligned working. 2024-02-20 20:23:42 -06:00
Rose Thompson
dac8fc16af Partially working optimized subwordwrite for misaligned. 2024-02-19 12:26:29 -06:00
Rose Thompson
1fd678b433 Optimized the align logic for loads. 2024-02-14 12:14:19 -06:00
Rose Thompson
e900bb09db Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-02-01 12:12:05 -06:00
David Harris
1c62c5e433 Fixed logic to work with FLEN < XLEN 2024-01-31 20:24:16 -08:00
Rose Thompson
aa15a63d9c Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-01-31 13:12:32 -06:00
David Harris
f37c7bb1f6 Incorporated RAM_LATENCY and BURST_EN as parameters rather than define in code. Still need to update testbench to use this 2024-01-30 06:27:18 -08:00
David Harris
45e2317636 Added Wally github address to header comments 2024-01-29 05:38:11 -08:00
Rose Thompson
81d006536a Lint passes with 32-bit no D$, but many regressions fail. 2024-01-18 09:48:44 -06:00
Rose Thompson
ff6bb3be0c Fixed another bug with virtual memory and no caches. 2024-01-18 09:29:52 -06:00
Rose Thompson
e8474373e4 Fixed it so Virtual Memory work without a D$. 2024-01-18 09:18:17 -06:00
Rose Thompson
dfe5ef4427 Added logic for the non-cache atomics. 2024-01-15 17:47:17 -06:00