bbracker
b30ea396b8
slightly smarter dtim HREADY
2021-03-13 07:03:33 -05:00
bbracker
63bfd79009
slightly smarter dtim HREADY
2021-03-13 06:55:34 -05:00
bbracker
12721837f0
imem rd2 adrbits bugfix
2021-03-13 00:10:41 -05:00
Ross Thompson
1f37d9d2db
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-12 20:18:35 -06:00
Ross Thompson
0edaa625e3
Fixed the issue with the batch mode not working after adding the function radix.
2021-03-12 20:16:03 -06:00
bbracker
0f49108ee6
clint HREADY signal update
2021-03-12 20:23:55 -05:00
Ross Thompson
2b9044b9aa
Cleaned up the function radix exractFunctionRadix script. I should change the name as this is no longer a modelsim radix.
2021-03-12 15:29:02 -06:00
Ross Thompson
ccaaa829ce
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-12 14:58:04 -06:00
Ross Thompson
0637874cac
Cleanup of the branch predictor flush and stall controls.
2021-03-12 14:57:53 -06:00
David Harris
4465854423
Drafted rv32a tests
2021-03-12 00:06:23 -05:00
David Harris
d4e84c58ed
64-bit AMO debugged
2021-03-11 23:18:33 -05:00
Ross Thompson
b1d1f3995c
Improve version of the function radix which does not cause the wave file rendering to slow down.
2021-03-11 17:12:21 -06:00
Noah Boorstin
be0bd317e9
test regression script: add commented out rv32ic tests
2021-03-11 12:57:54 -05:00
Noah Boorstin
641a320894
add rv32ic regression test
2021-03-11 12:40:29 -05:00
Noah Boorstin
2dfb944d15
test regression script: parallalize better
2021-03-11 12:25:20 -05:00
Noah Boorstin
b13365365b
test regression script: try adding verilator checking also
2021-03-11 07:32:31 +00:00
Noah Boorstin
8717f3604b
try adding delays to test regression script
2021-03-11 06:59:50 +00:00
Noah Boorstin
c5b6ca4cc6
this is just a test for now, try to reimplement regression-wally in bash
2021-03-11 06:45:45 +00:00
Noah Boorstin
f31d7a7f5c
busybear: account for CSR moving
2021-03-11 06:45:14 +00:00
Thomas Fleming
04a91a66cf
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-11 00:47:24 -05:00
David Harris
124e5739af
Drafted AMO tests
2021-03-11 00:42:13 -05:00
Thomas Fleming
e57b6cf18c
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
...
Conflicts:
wally-pipelined/src/ebu/ahblite.sv
2021-03-11 00:15:58 -05:00
David Harris
fe4d288589
Initial untested implementation of AMO instructions
2021-03-11 00:11:31 -05:00
Jarred Allen
ff48a9e992
Return testbench to normal
2021-03-10 22:58:41 -05:00
Ross Thompson
f1f7884e10
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-10 15:37:02 -06:00
Ross Thompson
149c9aa0f2
Added debug option to disable the function radix if not needed.
...
Function radix slows the simulation by 70 to 76 s (8.5%) for the rv64i tests.
2021-03-10 15:17:02 -06:00
Ross Thompson
4d7e926dbb
I finally think I got the function radix debugger working across both 32 and 64 bit applications.
2021-03-10 14:43:44 -06:00
Noah Boorstin
2d1f63b590
change flop in ahb controller to use normal flop module
2021-03-10 19:14:02 +00:00
Ross Thompson
7b7cacbaf0
Finally I think I have the function radix mapping across all applications correctly. I still need to clean up the code a bit so it is easier to understand.
2021-03-10 11:00:51 -06:00
Jarred Allen
c0ee17b6ac
Merge upstream changes
2021-03-09 21:20:34 -05:00
Jarred Allen
81b29a3891
More progress
2021-03-09 21:16:07 -05:00
David Harris
0baa004bb4
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-09 09:28:32 -05:00
David Harris
bea8ac6d59
WALLY-LRSC atomic test passing
2021-03-09 09:28:25 -05:00
Noah Boorstin
87e2a9b920
busybear: better NOPing out of float instructions
2021-03-08 21:24:19 +00:00
Noah Boorstin
9274d09ae2
busybear: better instrF checking
...
So this now checks instrF only when StallD is low. @kaveh I'd love your
opinion on this. I don't know if this is a good idea or not. Ideally we
should probably be checking InstrRawD instead, but I kind of want to stay
checking the instr in the F stage instead of D for now. Idk if this is worth
staying in F, I can't really see any big downsides to checking the instruction in
D except that PCD isn't an external signal, but neither is StallD, so.....
Anyway I'd love others' thoughts on this
2021-03-08 19:48:12 +00:00
Noah Boorstin
08e3691e59
busybear: make a second .do file with better optimization for command line mode
2021-03-08 19:35:00 +00:00
Noah Boorstin
1fc00d41c2
busybear: load mem files from verilog instead of .do
2021-03-08 19:26:26 +00:00
David Harris
52d4a04eb0
Created atomic test vector and directories
2021-03-08 09:38:55 -05:00
Ross Thompson
a3759f585d
Updated the paths to the branch predictor memory preloads for busy bear.
2021-03-05 15:36:00 -06:00
Ross Thompson
d6bc34121f
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-05 15:27:22 -06:00
Ross Thompson
9a93193d6a
Oups. I forgot to update other do files with the commands to preload the branch predictor memories.
2021-03-05 15:23:53 -06:00
Thomas Fleming
718bfecf46
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-05 16:20:53 -05:00
Noah Boorstin
d3bf36b15f
busybear: add branch preditor loading to do file
...
(sorry to add more loading to the do instead of less)
2021-03-05 21:01:41 +00:00
Thomas Fleming
ca2a65770c
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-03-05 15:46:51 -05:00
Noah Boorstin
f0a103687e
Merge branch 'main' into busybear
2021-03-05 20:27:19 +00:00
Noah Boorstin
6981907521
fix wally-pipelined-batch.do to match wally-pipelined.do
2021-03-05 20:27:01 +00:00
bbracker
612f7a9ee4
added a delay to sel signals
2021-03-05 15:07:34 -05:00
bbracker
a1223ee13b
more merging fixes
2021-03-05 14:36:07 -05:00
bbracker
2cd0f19129
remove deprecated mem signals
2021-03-05 14:27:38 -05:00
bbracker
420c9a11c2
refactored sim file
2021-03-05 14:25:16 -05:00
