1866 Commits

This Branch

This Branch

All Branches

Author	SHA1	Message	Date
David Harris	14e6d2c576	Converted flops to synchronous reset now that reset signal is synchronized	2021-10-25 11:49:20 -07:00
David Harris	47124f36c8	Added synchronizer to reset	2021-10-25 10:05:41 -07:00
Ross Thompson	b3a14452fa	Fixed synthesize script to find the flops after moving.	2021-10-25 09:43:07 -05:00
Ross Thompson	ebef47b1c9	Modified the cache's sram model so if it used to synthesize flip flops it terminates the read critical path at the address's input rather than the output read data.	2021-10-24 21:21:49 -05:00
Ross Thompson	87aaec3b6c	Partial cleanup of unused signals in caches and bpred.	2021-10-24 15:04:20 -05:00
bbracker	4544d28bc9	or actually needed to reduce expectations of buildroot	2021-10-24 06:59:34 -07:00
bbracker	23bff55c6e	increase regression's expectations of buildroot	2021-10-24 06:50:22 -07:00
bbracker	366cb12a13	buildroot do scripts now compile flops	2021-10-23 23:14:59 -07:00
bbracker	f6911be937	add W stage signals to linux testbench	2021-10-23 14:00:53 -07:00
bbracker	3b63dde570	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-10-23 13:17:37 -07:00
bbracker	d6fb441666	add option for regression to do a partial execution of buildroot	2021-10-23 13:17:30 -07:00
David Harris	67f3fc9962	wrapping up lint cleanup; many unused signals removed	2021-10-23 12:15:14 -07:00
David Harris	106982e493	more lsu/ifu lint cleanup	2021-10-23 12:10:13 -07:00
David Harris	8b1dc81d34	more lsu/ifu lint cleanup	2021-10-23 12:00:32 -07:00
David Harris	88b2d9e687	lsu/ifu lint cleanup	2021-10-23 11:41:20 -07:00
David Harris	d0aa6911ff	random lint cleanup	2021-10-23 11:24:36 -07:00
David Harris	bb4ad264ce	IEU cleanup	2021-10-23 11:13:28 -07:00
David Harris	b6bb33ecef	lint cleanup	2021-10-23 11:03:28 -07:00
David Harris	5e961973cb	IEU lint cleanup	2021-10-23 10:51:53 -07:00
David Harris	708b914a65	Lint cleanup from wallypipeliendhart	2021-10-23 10:29:52 -07:00
David Harris	817795f619	Lint cleanup: ahblite, ifu, hart	2021-10-23 10:12:33 -07:00
David Harris	2abec36221	Lint cleanup	2021-10-23 09:58:52 -07:00
David Harris	6ae9aa7d80	lint cleanup: FPU and privileged	2021-10-23 09:41:24 -07:00
David Harris	80d2b9bc0d	subword read and csrc lint cleanup	2021-10-23 09:29:15 -07:00
David Harris	0eabd0ecc2	FMA and CSRC lint cleanup	2021-10-23 09:20:24 -07:00
David Harris	5235e61d9e	Lint cleanup	2021-10-23 09:06:21 -07:00
David Harris	bf3eb7b814	update scripts for handling src/*/* subdirectories	2021-10-23 08:54:29 -07:00
David Harris	7732d38c36	lint cleaning and moved files into subdirectories	2021-10-23 08:53:32 -07:00
David Harris	ff409d4fe7	Lint cleanup	2021-10-23 08:39:21 -07:00
David Harris	1b1317e6c3	hope I added logic declarations to divconv_pipe ok	2021-10-23 08:10:16 -07:00
James E. Stine	0e2efca490	Remove redundant logic value	2021-10-23 10:02:47 -05:00
David Harris	8b854bb1c2	Cleaned up LINT erors	2021-10-23 06:28:49 -07:00
David Harris	5142bfd624	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-10-23 06:15:49 -07:00
David Harris	3407b63c8a	Added -lint flag to vsim. Cleaned some lint errors. Moved lint-wally to regression directory for convenience.	2021-10-23 06:15:26 -07:00
kipmacsaigoren	611c4733cf	lowered number of paths to speed synth up and removed extra unnecessary report copying.	2021-10-22 15:25:11 -05:00
kipmacsaigoren	c2f4b49b15	removed reduntant definitions for FPU in MISA.	2021-10-22 15:18:25 -05:00
James E. Stine	a60e19dc3f	Modify register before fpdivsqrt to be synthesizable for FPGAs and better in tune for ASIC clocking	2021-10-22 13:41:50 -05:00
Katherine Parry	00cc1e0c5c	put the FMA priority encoders into their own module	2021-10-22 10:03:12 -07:00
James E. Stine	0e0a107a98	Get rid of lint warning - still need more testing though	2021-10-21 15:19:22 -05:00
James E. Stine	49721a169b	Clean up some FPU and add pipelined fpdivsqrt to fpu.sv	2021-10-21 13:52:12 -05:00
James E. Stine	129ef03b2d	Fix fpdivsqrt lint error on CPA for convergence	2021-10-20 17:46:13 -05:00
David Harris	687703f0d8	removed .* from wallypipeliendsoc	2021-10-20 13:49:18 -07:00
davidharrishmc	923d03f657	Update README.md	2021-10-20 10:49:41 -07:00
kipmacsaigoren	742480d27d	Fixed path to src and config files, added mdu timing reports	2021-10-20 12:41:14 -05:00
kipmacsaigoren	b2deedd4b4	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2021-10-20 12:15:53 -05:00
kipmacsaigoren	f0cf8bf17e	Removed historical outputs from repo	2021-10-20 12:15:40 -05:00
James E. Stine	7536e0a2ee	Added pipelined version of fpdivsqrt as well as analysis of fpdivsqrt to cut multiplier down to 60bits.	2021-10-20 12:00:41 -05:00
David Harris	4aeadaacf0	moved coemark and testsBP to tests	2021-10-20 09:10:06 -07:00
David Harris	55fbafec74	moved imperas-riscv-tests to tests	2021-10-20 09:07:46 -07:00
David Harris	0e4f6392d6	Move tests into subdirectory and moved wavedrom out of project	2021-10-20 09:03:21 -07:00