David Harris
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106982e493
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more lsu/ifu lint cleanup
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2021-10-23 12:10:13 -07:00 |
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David Harris
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8b1dc81d34
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more lsu/ifu lint cleanup
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2021-10-23 12:00:32 -07:00 |
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David Harris
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88b2d9e687
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lsu/ifu lint cleanup
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2021-10-23 11:41:20 -07:00 |
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David Harris
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d0aa6911ff
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random lint cleanup
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2021-10-23 11:24:36 -07:00 |
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David Harris
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bb4ad264ce
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IEU cleanup
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2021-10-23 11:13:28 -07:00 |
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David Harris
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b6bb33ecef
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lint cleanup
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2021-10-23 11:03:28 -07:00 |
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David Harris
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5e961973cb
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IEU lint cleanup
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2021-10-23 10:51:53 -07:00 |
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David Harris
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708b914a65
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Lint cleanup from wallypipeliendhart
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2021-10-23 10:29:52 -07:00 |
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David Harris
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817795f619
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Lint cleanup: ahblite, ifu, hart
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2021-10-23 10:12:33 -07:00 |
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David Harris
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2abec36221
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Lint cleanup
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2021-10-23 09:58:52 -07:00 |
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David Harris
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6ae9aa7d80
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lint cleanup: FPU and privileged
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2021-10-23 09:41:24 -07:00 |
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David Harris
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80d2b9bc0d
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subword read and csrc lint cleanup
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2021-10-23 09:29:15 -07:00 |
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David Harris
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0eabd0ecc2
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FMA and CSRC lint cleanup
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2021-10-23 09:20:24 -07:00 |
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David Harris
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5235e61d9e
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Lint cleanup
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2021-10-23 09:06:21 -07:00 |
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David Harris
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bf3eb7b814
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update scripts for handling src/*/* subdirectories
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2021-10-23 08:54:29 -07:00 |
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David Harris
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7732d38c36
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lint cleaning and moved files into subdirectories
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2021-10-23 08:53:32 -07:00 |
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David Harris
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ff409d4fe7
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Lint cleanup
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2021-10-23 08:39:21 -07:00 |
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David Harris
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1b1317e6c3
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hope I added logic declarations to divconv_pipe ok
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2021-10-23 08:10:16 -07:00 |
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James E. Stine
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0e2efca490
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Remove redundant logic value
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2021-10-23 10:02:47 -05:00 |
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David Harris
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8b854bb1c2
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Cleaned up LINT erors
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2021-10-23 06:28:49 -07:00 |
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David Harris
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5142bfd624
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-10-23 06:15:49 -07:00 |
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David Harris
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3407b63c8a
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Added -lint flag to vsim. Cleaned some lint errors. Moved lint-wally to regression directory for convenience.
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2021-10-23 06:15:26 -07:00 |
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kipmacsaigoren
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611c4733cf
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lowered number of paths to speed synth up and removed extra unnecessary report copying.
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2021-10-22 15:25:11 -05:00 |
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kipmacsaigoren
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c2f4b49b15
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removed reduntant definitions for FPU in MISA.
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2021-10-22 15:18:25 -05:00 |
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James E. Stine
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a60e19dc3f
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Modify register before fpdivsqrt to be synthesizable for FPGAs and better in tune for ASIC clocking
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2021-10-22 13:41:50 -05:00 |
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Katherine Parry
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00cc1e0c5c
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put the FMA priority encoders into their own module
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2021-10-22 10:03:12 -07:00 |
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James E. Stine
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0e0a107a98
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Get rid of lint warning - still need more testing though
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2021-10-21 15:19:22 -05:00 |
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James E. Stine
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49721a169b
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Clean up some FPU and add pipelined fpdivsqrt to fpu.sv
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2021-10-21 13:52:12 -05:00 |
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James E. Stine
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129ef03b2d
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Fix fpdivsqrt lint error on CPA for convergence
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2021-10-20 17:46:13 -05:00 |
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David Harris
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687703f0d8
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removed .* from wallypipeliendsoc
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2021-10-20 13:49:18 -07:00 |
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davidharrishmc
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923d03f657
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Update README.md
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2021-10-20 10:49:41 -07:00 |
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kipmacsaigoren
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742480d27d
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Fixed path to src and config files, added mdu timing reports
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2021-10-20 12:41:14 -05:00 |
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kipmacsaigoren
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b2deedd4b4
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2021-10-20 12:15:53 -05:00 |
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kipmacsaigoren
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f0cf8bf17e
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Removed historical outputs from repo
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2021-10-20 12:15:40 -05:00 |
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James E. Stine
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7536e0a2ee
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Added pipelined version of fpdivsqrt as well as analysis of fpdivsqrt to cut multiplier down to 60bits.
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2021-10-20 12:00:41 -05:00 |
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David Harris
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4aeadaacf0
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moved coemark and testsBP to tests
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2021-10-20 09:10:06 -07:00 |
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David Harris
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55fbafec74
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moved imperas-riscv-tests to tests
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2021-10-20 09:07:46 -07:00 |
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David Harris
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0e4f6392d6
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Move tests into subdirectory and moved wavedrom out of project
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2021-10-20 09:03:21 -07:00 |
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David Harris
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15e3b36a75
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-10-19 14:08:24 -07:00 |
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David Harris
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8747791bb8
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radix 2 SRT checkin
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2021-10-19 14:08:16 -07:00 |
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bbracker
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ca61d9b6b8
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gitignore the addins folder because it contains external repos
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2021-10-19 13:32:26 -07:00 |
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James E. Stine
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ed179b0bd9
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Some more sanitization but will pass to legal to determine if okay on version - it is substantially different in some ways but not a legal expert on this
|
2021-10-19 12:09:43 -05:00 |
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James E. Stine
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b65a4bd040
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Modify DW02_multp to properly list the correct number of bits at the output (i.e., 2*WIDTH + 2).
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2021-10-19 11:58:06 -05:00 |
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David Harris
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8d08ca6a1e
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Changed some flops to settable
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2021-10-18 17:05:29 -07:00 |
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David Harris
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965946cae3
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-10-18 16:54:08 -07:00 |
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David Harris
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df0b65e483
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replaced flopenl with flopenr when clearing to 0
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2021-10-18 16:53:18 -07:00 |
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davidharrishmc
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83af0740b5
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Update README.md
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2021-10-18 16:23:22 -07:00 |
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David Harris
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d0b9ebd2ef
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-10-18 15:44:31 -07:00 |
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David Harris
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47f7a5db9c
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Fixed multiplier and pointed arch tests to new path in addins
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2021-10-18 15:43:59 -07:00 |
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Ross Thompson
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83a76ffb0c
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2021-10-18 17:25:48 -05:00 |
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