Jordan Carlin
|
495d1c7145
|
Only generate RISCV version of softfloat
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2024-09-28 21:43:41 -07:00 |
|
Jordan Carlin
|
14b630a403
|
More testfloat fixups
|
2024-09-28 20:56:58 -07:00 |
|
Jordan Carlin
|
0c2ce32c56
|
Update fp Makefile to generate softfloat
|
2024-09-28 20:23:27 -07:00 |
|
Jordan Carlin
|
bf0c7fba95
|
Update fp Makefile to generate softfloat
|
2024-09-28 20:20:06 -07:00 |
|
Jordan Carlin
|
0bfd0dc32d
|
Add license header to new floating point Makefiles
|
2024-09-20 16:43:36 -07:00 |
|
Jordan Carlin
|
d7edeef79a
|
Update top level floating point test Makefile to build all vectors and testfloat binaries
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2024-09-20 16:28:05 -07:00 |
|
Jordan Carlin
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766678d076
|
Add clean target to vector makefile
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2024-09-20 16:22:25 -07:00 |
|
Jordan Carlin
|
aa1a86c70e
|
More testfloat Makefile refactoring and fix using the wrong softfloat
|
2024-09-19 15:34:16 -07:00 |
|
Jordan Carlin
|
90cf61401e
|
Fix testfloat Makefile
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2024-09-19 13:39:24 -07:00 |
|
Jordan Carlin
|
cc92cb125f
|
Makefile for all fp testvectors
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2024-09-19 13:38:35 -07:00 |
|
Jordan Carlin
|
7071d15341
|
Initial attempt at two separate version of testfloat for riscv and ieee
|
2024-09-18 17:37:29 -07:00 |
|
Jordan Carlin
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c13c57b5a6
|
Refactor floating point testvector Makefile to split up RISCV and IEEE due to Make issues
|
2024-09-18 17:37:02 -07:00 |
|
Jordan Carlin
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cb944e0f92
|
Remove old testfloat and replace references
|
2024-09-15 01:03:03 -07:00 |
|
Jordan Carlin
|
7e41961dd1
|
Remove old softfloat and replace references
|
2024-09-15 00:34:18 -07:00 |
|
Jordan Carlin
|
f7b93ac700
|
More simplification of fp testvector makefile
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2024-09-14 20:59:00 -07:00 |
|
Jordan Carlin
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d2ef362761
|
Fix testfloat cvtint generation
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2024-09-14 20:16:28 -07:00 |
|
Jordan Carlin
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ec8302d597
|
Split up cvtint and cvtfp tests
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2024-09-14 20:11:09 -07:00 |
|
David Harris
|
6e0b0487dd
|
Recreated coverage changes
|
2024-09-05 16:32:45 -07:00 |
|
David Harris
|
712274af3d
|
Removed covergen makefile
|
2024-09-05 16:29:07 -07:00 |
|
David Harris
|
941d662b59
|
Removed covergen
|
2024-09-05 16:28:48 -07:00 |
|
naichewa
|
58be9e0556
|
Merge branch 'spi_debug'
|
2024-09-03 15:00:59 -07:00 |
|
naichewa
|
3b7661dfd5
|
SckDiv Zero bug fixes
|
2024-09-03 14:58:46 -07:00 |
|
David Harris
|
ff9f0fa140
|
Updated riscv-isac dependencies for security
|
2024-09-03 03:46:44 -07:00 |
|
Jacob Pease
|
3b91977227
|
Added start.s to spitest directory.
|
2024-08-28 04:10:24 -05:00 |
|
Jacob Pease
|
44ece7cb96
|
Added CVW header to spitest files.
|
2024-08-27 14:28:49 -05:00 |
|
Jacob Pease
|
b7a74307c5
|
Committing the custom test spitest.
|
2024-08-27 14:19:56 -05:00 |
|
Rose Thompson
|
6be30369f1
|
Merge branch 'main' of github.com:openhwgroup/cvw
|
2024-08-21 11:02:23 -07:00 |
|
Rose Thompson
|
faffecf891
|
Merge branch 'main' of github.com:openhwgroup/cvw
|
2024-08-21 11:02:17 -07:00 |
|
Rose Thompson
|
01b623b8c4
|
Merge branch 'main' of github.com:openhwgroup/cvw
|
2024-08-21 11:02:08 -07:00 |
|
Rose Thompson
|
f603d21826
|
Updated my name in multiple locations.
|
2024-08-21 10:50:39 -07:00 |
|
Huda-10xe
|
ca21b865b3
|
Adding regression commands to Makefile
|
2024-08-21 15:45:23 +05:00 |
|
Jacob Pease
|
baad4e0fd2
|
With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests.
|
2024-08-20 16:24:37 -05:00 |
|
David Harris
|
f4871c14f7
|
Merge pull request #918 from jordancarlin/fp_tests_make
Testfloat vector generation refactoring + root Makefile cleanup
|
2024-08-17 04:32:45 -07:00 |
|
David Harris
|
ef7028154c
|
Merge pull request #873 from Shreesh-Kulkarni/main
Modified riscv-isacov and riscv-ctg files to support some missing quad instructions.
|
2024-08-16 11:10:35 -07:00 |
|
Jordan Carlin
|
d6110c3d0b
|
Set riscof jobs based on number of cores
|
2024-08-15 19:02:48 -07:00 |
|
Jordan Carlin
|
3b85f92695
|
Testfloat vector generation refactoring
|
2024-08-15 18:53:26 -07:00 |
|
Jordan Carlin
|
6d77398c95
|
Update linker scripts to avoid hardcoded /opt/riscv
|
2024-08-09 20:15:28 -07:00 |
|
Jordan Carlin
|
357175f1c8
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
|
2024-08-07 20:22:55 -07:00 |
|
Huda-10xe
|
2405b6c1e2
|
Adding RVVI Functional Coverage Support
|
2024-08-07 14:31:16 +05:00 |
|
Jordan Carlin
|
2f1a101735
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
|
2024-07-25 21:21:57 -07:00 |
|
David Harris
|
b7fb786749
|
Increased covergen.py functional coverage to 87.6%
|
2024-07-23 04:38:13 -07:00 |
|
David Harris
|
a9fd6e6cfb
|
Added more RV64I coverage generation
|
2024-07-22 08:52:19 -07:00 |
|
David Harris
|
6ca7845c93
|
Fixed hazard and rd_maxval coverage generation
|
2024-07-21 19:46:30 -07:00 |
|
Shreesh-Kulkarni
|
82b42a5faf
|
Modified riscv-isacov and riscv-ctg files to support some missing quad instructions. Needs debugging.
|
2024-07-06 08:57:32 -07:00 |
|
Jordan Carlin
|
e6e070f4e4
|
Update python shebangs to use /usr/bin/env python3 so virtual environment can be used (also aids in general portability)
|
2024-07-03 20:42:55 -07:00 |
|
Jordan Carlin
|
2b4f12916e
|
Merge pull request #858 from davidharrishmc/dev
Regression Improvements
|
2024-07-01 20:04:31 -07:00 |
|
James Stine
|
f660779ba9
|
Fix for Q causing it to error out - commented out line for ISA and reset-val so can be put back
|
2024-06-28 12:17:15 -05:00 |
|
David Harris
|
8fe2052b1f
|
Fix derived configuration with new derivgen script
|
2024-06-26 16:09:59 -07:00 |
|
David Harris
|
21e5fa3103
|
Merge pull request #854 from Shreesh-Kulkarni/main
Files for Quad Precision Testing Support for Wally
|
2024-06-26 11:41:26 -07:00 |
|
Shreesh-Kulkarni
|
93fb0f2a84
|
Files for Quad Precision Testing Support for Wally
|
2024-06-26 11:36:04 -07:00 |
|
David Harris
|
0fcc7878dc
|
Updated march lists
|
2024-06-25 21:54:58 -07:00 |
|
David Harris
|
d8d94eeafa
|
Merge pull request #808 from jordancarlin/main
Update riscv-arch-test
|
2024-06-20 08:43:41 -07:00 |
|
Ross Thompson
|
9e93f21990
|
Updated covergen to not include stores as they are incomplete.
Modified makefile riscv-dv to not simulation only generate tests.
|
2024-06-19 15:13:49 -07:00 |
|
Jordan Carlin
|
d58b454a8b
|
Finish switching Zfa to use riscv-arch-test
|
2024-06-18 23:31:37 -07:00 |
|
Jordan Carlin
|
6f79dca9c4
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2024-05-27 12:29:24 -07:00 |
|
Quswar Abid
|
997b5901cc
|
sb types are all passing, loaditypes are not!
|
2024-05-27 04:27:50 -07:00 |
|
Quswar Abid
|
1bf9b13953
|
added some sb types
|
2024-05-27 03:58:38 -07:00 |
|
Quswar Abid
|
29d7cd5663
|
unwanted comments
|
2024-05-27 03:58:38 -07:00 |
|
Quswar Abid
|
8edc4057ed
|
compilable tests generating for loaditypes[lb, lh, lw, ld, lbu, lhu, lwu]
|
2024-05-27 03:58:38 -07:00 |
|
Jordan Carlin
|
dcafe4793e
|
Add froundnx and fround.d tests
|
2024-05-24 15:16:35 -07:00 |
|
Jordan Carlin
|
f410bbb79e
|
Use Zfa tests from riscv-arch-test instead of wally-riscv-arch-test
|
2024-05-21 00:04:27 -07:00 |
|
Rose Thompson
|
e295454948
|
Merge pull request #798 from jordancarlin/newConfig
Update config to derive MISA from macros and update MISA bits based on the spec
|
2024-05-15 10:28:44 -05:00 |
|
Jordan Carlin
|
1065b8977a
|
Fix Q_SUPPORTED on derived configs
|
2024-05-14 11:49:54 -07:00 |
|
David Harris
|
990d40410b
|
Test using fpcalc for fp_dataset.py
|
2024-05-14 11:11:24 -07:00 |
|
Shreesh-Kulkarni
|
9aebc1526e
|
Python script to generate coverpoints for the IBM FP Dataset
|
2024-05-14 10:43:32 -07:00 |
|
Shreesh-Kulkarni
|
0887e90367
|
Modified IBM Floating Point Dataset Generator for Quads
|
2024-05-14 10:34:45 -07:00 |
|
David Harris
|
75c10bddfa
|
Moved case.sh to tests/fp
|
2024-05-13 07:12:16 -07:00 |
|
David Harris
|
025e65ce1a
|
Removed unnecessary printing from extract_arch_vectors
|
2024-05-06 06:28:15 -07:00 |
|
David Harris
|
c8269c34a5
|
Changed error to warning
|
2024-05-06 03:50:17 -07:00 |
|
David Harris
|
99282165ae
|
Directed functional coverage tests
|
2024-05-04 02:45:01 -07:00 |
|
David Harris
|
712a167a3a
|
Removed obsolete testgen files
|
2024-05-04 02:44:31 -07:00 |
|
David Harris
|
5d6665cc50
|
More directed testing
|
2024-05-03 11:44:03 -07:00 |
|
David Harris
|
325ec4c8c8
|
Removed obsolete utility
|
2024-05-03 10:58:44 -07:00 |
|
David Harris
|
e667adf946
|
Added covergen directed coverage generator
|
2024-05-01 14:47:37 -07:00 |
|
David Harris
|
b7e66ec7d6
|
Added Zcb tests to riscof
|
2024-04-20 13:17:33 -07:00 |
|
Jordan Carlin
|
6ef6bc042d
|
Update RISCOF ISA config MISA values to be consistent
|
2024-04-06 18:18:50 -07:00 |
|
Rose Thompson
|
b87cdd49a3
|
Merge pull request #690 from davidharrishmc/dev
fcvt.h.l fixes, removed delays
|
2024-03-28 13:42:41 -05:00 |
|
David Harris
|
2b29b107a7
|
Wrote initial covergen for a few R-type instructions
|
2024-03-27 16:22:13 -07:00 |
|
Rose Thompson
|
7c3e93bb2c
|
added lpddrtest.
|
2024-03-26 18:42:48 -05:00 |
|
David Harris
|
4eb7de7381
|
Removed Zfh tests from wally-riscv-arch-test now that they are available in riscv-arch-test
|
2024-03-26 13:58:59 -07:00 |
|
David Harris
|
6688577bc4
|
Fixed fcvt test macro
|
2024-03-25 12:21:15 -07:00 |
|
David Harris
|
690338b758
|
Incorporated fixed fcvt.h.l* instructions; they now run in the testbench
|
2024-03-25 06:08:27 -07:00 |
|
David Harris
|
b3661a0af4
|
Removed unused WALLY-lrsc reference outputs that were incorrect and are not used because Sail is the reference instead
|
2024-03-24 12:31:49 -07:00 |
|
Rose Thompson
|
e97c2cbd83
|
Merge pull request #676 from davidharrishmc/dev
Incorporated Zfa and Zfh tests into wally-riscv-arch-test, mcmodel example code, minor cleanup
|
2024-03-20 09:45:39 -05:00 |
|
Kevin Kim
|
d790a88277
|
fixed bug in intdivrem test vector extraction
|
2024-03-17 14:47:37 -07:00 |
|
David Harris
|
9ff9f9e0ae
|
Updated wally-riscv-arch-test to be able to compile zfh and zfa tests. This caused a change in startup code, so certain reference_output results needed to change to compensate. Also commented out fcvtmod test in Zfa that fails because Sail produces the wrong expected value.
|
2024-03-14 19:03:57 -07:00 |
|
David Harris
|
48799aa87c
|
Added Zfh and Zfa tests to wally-riscv-arch-test until they are accepted in riscv-arch-test repo
|
2024-03-14 10:49:36 -07:00 |
|
David Harris
|
5e3ff3e871
|
Merge pull request #671 from Karl-Han/increase_riscof_jobs
Increase number of jobs in riscof to speedup building.
|
2024-03-13 14:52:05 -07:00 |
|
Kunlin Han
|
b5419ccfc9
|
Increase number of jobs in riscof to speedup building.
|
2024-03-13 12:28:30 -07:00 |
|
Rose Thompson
|
3cf6a19729
|
Merge branch 'main' into main
|
2024-03-10 10:48:21 -05:00 |
|
Rose Thompson
|
402d71e5f4
|
Added basic Quad testing.
|
2024-03-07 15:19:53 -06:00 |
|
Rose Thompson
|
a85ace87c7
|
Sold progress towards a decent q test.
|
2024-03-07 15:01:48 -06:00 |
|
Rose Thompson
|
1872966b0b
|
Progress.
|
2024-03-07 13:02:24 -06:00 |
|
Rose Thompson
|
24dffa39d5
|
Yay. David and I got our first Quad load/store instructions working!
|
2024-03-07 12:48:52 -06:00 |
|
Rose Thompson
|
60f96112db
|
Moved the zero stage boot loader to the fpga directory.
|
2024-03-01 10:23:55 -06:00 |
|
KelvinTr
|
01c45ab9d7
|
Fixed K extension changes
|
2024-02-28 17:05:08 -06:00 |
|
James E. Stine
|
0d4d996655
|
add spike riscof items for K extension test
|
2024-02-24 22:43:33 -06:00 |
|
David Harris
|
824bc0dab7
|
Fixed expected value on WALLY-satp-invalid
|
2024-02-16 11:12:57 -08:00 |
|
Rose Thompson
|
6110799a1e
|
Updated the wally rv32 priv tests to not use sail.
|
2024-02-16 11:39:06 -06:00 |
|
David Harris
|
b362320dd9
|
Removed unused Makefiles and Makefrags from wally-riscv-arch-test now that it is only used by riscof
|
2024-02-16 06:46:49 -08:00 |
|