ushakya22
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b0f6898ece
|
Updates to WALLY-IE tests
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2021-04-08 13:54:42 -04:00 |
|
Domenico Ottolia
|
3067e94b4b
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Update privileged testgen & helper script
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2021-04-08 05:14:07 -04:00 |
|
Domenico Ottolia
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65abe13f4f
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Cause an Illegal Instruction Exception when attempting to write readonly CSRs
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2021-04-08 05:12:54 -04:00 |
|
Thomas Fleming
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fc39535e4e
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Refactor TLB into multiple files
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2021-04-08 03:24:10 -04:00 |
|
Thomas Fleming
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c54aecde73
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Provide attribution link for priority encoder
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2021-04-08 03:05:06 -04:00 |
|
Thomas Fleming
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303c2c4839
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Implement support for superpages
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2021-04-08 02:44:59 -04:00 |
|
ushakya22
|
83d9aa3a50
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MIE privilege tests with working timer interupt
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2021-04-07 04:09:09 -04:00 |
|
Domenico Ottolia
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60cf38192b
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Add privileged tests to testbench
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2021-04-07 02:22:08 -04:00 |
|
Domenico Ottolia
|
465d3986b0
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Add passing mtval and mepc tests
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2021-04-07 02:21:05 -04:00 |
|
Noah Boorstin
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284d583877
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add busybear boot files with git-lfs
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2021-04-05 19:38:43 -04:00 |
|
Noah Boorstin
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0e3f013212
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busybear: reenable 'ruthless' CSR checking
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2021-04-05 12:53:30 -04:00 |
|
bbracker
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38017e6aae
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declare memread signal
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2021-04-05 08:13:01 -04:00 |
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bbracker
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a4c3afb847
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PLIC claim reg side effects now check for memread signal
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2021-04-05 08:03:14 -04:00 |
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bbracker
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4a5aa5b202
|
plic subword access compliance
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2021-04-04 23:10:33 -04:00 |
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Katherine Parry
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e6a7353847
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Added missing files in FPU
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2021-04-04 18:09:13 +00:00 |
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bbracker
|
31c6b2d01f
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Yee hoo first draft of PLIC plus self-checking tests
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2021-04-04 06:40:53 -04:00 |
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Thomas Fleming
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6b43381c38
|
Comment out fpu from hart until module exists
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2021-04-03 22:34:11 -04:00 |
|
Thomas Fleming
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dbd5a4320e
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Merge branch 'mmu' into main
Conflicts:
wally-pipelined/src/wally/wallypipelinedhart.sv
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2021-04-03 22:12:52 -04:00 |
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Thomas Fleming
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8dfec29f7e
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2021-04-03 22:09:50 -04:00 |
|
Noah Boorstin
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f4e5642c62
|
busybear: temporary stop after 800k instrs
|
2021-04-03 21:37:57 -04:00 |
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Thomas Fleming
|
1cbdaf1f05
|
Fix extraneous page fault stall
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2021-04-03 21:28:24 -04:00 |
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Katherine Parry
|
d7b1379ab8
|
Integrated FPU
|
2021-04-03 20:52:26 +00:00 |
|
Ross Thompson
|
d21006d048
|
Partial fix to the integer divide stall issue.
|
2021-04-02 15:32:15 -05:00 |
|
James E. Stine
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362f6ea2e6
|
Minor cleanup
|
2021-04-02 08:20:44 -05:00 |
|
James E. Stine
|
0595ae983f
|
Put back imperas testbench until figure out why m_supported is running for rv64ic
|
2021-04-02 08:19:25 -05:00 |
|
James E. Stine
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cff08adc3a
|
Added some updates to divider - still not working all the time. Still a bug with signals within muldiv - specificaly MultDivE being modified during Execute stage. Seems to be triggered by ahblite signal.
|
2021-04-02 06:27:37 -05:00 |
|
Thomas Fleming
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bfb4b051c6
|
Merge branch 'main' into mmu
|
2021-04-01 16:29:39 -04:00 |
|
Thomas Fleming
|
350fe87119
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2021-04-01 16:24:06 -04:00 |
|
Thomas Fleming
|
38a0199260
|
Merge branch 'mmu' of github.com:davidharrishmc/riscv-wally into mmu
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2021-04-01 16:23:19 -04:00 |
|
Thomas Fleming
|
fdb20ee1cf
|
Implement sfence.vma and fix tlb writing
|
2021-04-01 15:55:05 -04:00 |
|
James E. Stine
|
0495195d68
|
Fixed some divide -still bug in AHB causing InstStall to deassert and next instruction to get into divide unit. Hope to fix soon. Divide seems to work if given enough time.
|
2021-04-01 12:30:37 -05:00 |
|
Teo Ene
|
7c364a26e9
|
Updated MISA in coremark_bare config file
|
2021-03-31 20:39:02 -05:00 |
|
Noah Boorstin
|
75f58c4df5
|
busybear: temporarially stop checking CSRs
|
2021-03-31 14:14:32 -04:00 |
|
Noah Boorstin
|
118e846ef7
|
busybear: clean up questa warnings
|
2021-03-31 14:04:57 -04:00 |
|
Noah Boorstin
|
43532be770
|
busybear: clean up questa warnings
|
2021-03-31 14:02:15 -04:00 |
|
Thomas Fleming
|
77b8e27205
|
Disable 'always-on' virtual memory
|
2021-03-30 22:49:47 -04:00 |
|
Thomas Fleming
|
56e256baa5
|
Extend lint-wally to lint both rv32 and rv64
|
2021-03-30 22:42:28 -04:00 |
|
Thomas Fleming
|
eca2427f94
|
Merge remote-tracking branch 'origin/main' into main
Bring icache and MMU code together
Conflicts:
wally-pipelined/src/ifu/ifu.sv
wally-pipelined/testbench/testbench-imperas.sv
|
2021-03-30 22:24:47 -04:00 |
|
Thomas Fleming
|
7126ab7864
|
Complete basic page table walker
|
2021-03-30 22:19:27 -04:00 |
|
Thomas Fleming
|
0994d03b28
|
Update virtual memory tests and move to separate folder
|
2021-03-30 22:18:29 -04:00 |
|
Domenico Ottolia
|
f7cbaeb217
|
Add one more test to WALLY-CAUSE, and update privileged testgen
|
2021-03-30 19:44:58 -04:00 |
|
Domenico Ottolia
|
6619a5f44f
|
Add mcause tests to testbench
|
2021-03-30 17:17:59 -04:00 |
|
Domenico Ottolia
|
61b19a0cd0
|
Update privileged tests generator
|
2021-03-30 16:58:46 -04:00 |
|
Domenico Ottolia
|
351c71e812
|
Add all working mcause tests
|
2021-03-30 16:55:12 -04:00 |
|
ushakya22
|
6b9ae41302
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-03-30 15:25:07 -04:00 |
|
ushakya22
|
fbed5d658e
|
privilege tests
|
2021-03-30 15:23:47 -04:00 |
|
Noah Boorstin
|
05d362e334
|
regression: use busybear batch instead
|
2021-03-25 15:34:10 -04:00 |
|
Domenico Ottolia
|
56a32b5882
|
More bug fixes for privileged tests
|
2021-03-25 15:05:55 -04:00 |
|
Brett Mathis
|
162f2df880
|
FPU Pipeline completed - can begin integration
|
2021-03-25 13:29:03 -05:00 |
|
Domenico Ottolia
|
f134b09a97
|
Fix bugs with privileged tests
|
2021-03-25 14:06:05 -04:00 |
|