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Update virtual memory tests and move to separate folder

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This commit is contained in:
Thomas Fleming 2021-03-30 22:18:29 -04:00
parent 51291949d8
commit 0994d03b28
2 changed files with 19 additions and 8 deletions
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23
wally-pipelined/testbench/testbench-imperas.sv
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@ -40,6 +40,15 @@ module testbench();
string InstrFName, InstrDName, InstrEName, InstrMName, InstrWName;
//logic [31:0] InstrW;
logic [`XLEN-1:0] meminit;
string tests32mmu[] = '{
"rv32mmu/WALLY-VIRTUALMEMORY", "5000"
};
string tests64mmu[] = '{
"rv64mmu/WALLY-VIRTUALMEMORY", "5000"
};
string tests64a[] = '{
"rv64a/WALLY-AMO", "2110",
"rv64a/WALLY-LRSC", "2110"
@ -338,13 +347,14 @@ string tests32i[] = {
initial
if (`XLEN == 64) begin // RV64
if(TESTSBP) begin
tests = testsBP64;
tests = testsBP64;
end else begin
tests = {tests64i};
if (`C_SUPPORTED) tests = {tests, tests64ic};
else tests = {tests, tests64iNOc};
if (`M_SUPPORTED) tests = {tests, tests64m};
if (`A_SUPPORTED) tests = {tests, tests64a};
tests = {tests64i};
if (`C_SUPPORTED) tests = {tests, tests64ic};
else tests = {tests, tests64iNOc};
if (`M_SUPPORTED) tests = {tests, tests64m};
if (`A_SUPPORTED) tests = {tests, tests64a};
//if (`MEM_VIRTMEM) tests = {tests, tests64mmu};
end
// tests = {tests64a, tests};
end else begin // RV32
@ -354,6 +364,7 @@ string tests32i[] = {
else tests = {tests, tests32iNOc};
if (`M_SUPPORTED % 2 == 1) tests = {tests, tests32m};
if (`A_SUPPORTED) tests = {tests, tests32a};
//if (`MEM_VIRTMEM) tests = {tests32mmu, tests};
end
string signame, memfilename;

4
wally-pipelined/testgen/virtual_memory_util.py
View File

@ -198,14 +198,14 @@ rv32 = Architecture(32)
rv64 = Architecture(64)
if __name__ == "__main__":
arch = rv64
arch = rv32
pgdir = PageTable("page_directory", next_ppn(), arch)
# Directly map the first 20 pages of RAM
for page in range(20):
vaddr = 0x80000000 + (arch.PGSIZE * page)
paddr = 0x80000000 + (arch.PGSIZE * page)
pgdir.add_mapping(vaddr, paddr, PTE_R | PTE_W | PTE_U | PTE_X | PTE_V)
pgdir.add_mapping(vaddr, paddr, PTE_D | PTE_A | PTE_R | PTE_W | PTE_U | PTE_X | PTE_V)
"""
supervisor_pgdir = PageTable("sdir", next_ppn(), rv64)
supervisor_pgdir.add_mapping(0x80000000, 0x80000000, PTE_R | PTE_W | PTE_X)