Ross Thompson
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e12e6c3acd
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Added more i-cache signals to wave file.
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2022-07-24 00:24:13 -05:00 |
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Ross Thompson
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458bfbf6f6
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Merged evict dirty clear with flush write back.
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2022-07-24 00:22:43 -05:00 |
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Ross Thompson
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70032bf8f4
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-07-23 08:41:59 -05:00 |
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Ross Thompson
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5cd6c8069d
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signal name cleanup.
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2022-07-22 23:36:27 -05:00 |
|
Ross Thompson
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7d026e02f2
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cache cleanup after removing replay on cpubusy.
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2022-07-22 23:30:25 -05:00 |
|
Ross Thompson
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706bc819e1
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cache fsm cleanup after removal of replay.
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2022-07-22 23:25:09 -05:00 |
|
Ross Thompson
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0f586c9ed3
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Possible improvement to cache which removes the cpu_busy states.
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2022-07-22 23:20:37 -05:00 |
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Katherine Parry
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bd336f18b3
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merged radix-2 sqrt into divider - doesnt work yet
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2022-07-23 00:41:18 +00:00 |
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slmnemo
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5b71ceac5c
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-07-22 17:13:38 -07:00 |
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slmnemo
|
0bfc3fda1b
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Fixed UART FIFO bugs and added FIFO tests
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2022-07-22 17:13:19 -07:00 |
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Daniel Torres
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b726b05d61
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fixed wally rv32e tests, updated regression makefile to new testflow
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2022-07-22 17:09:46 -07:00 |
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Daniel Torres
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640c9562d3
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-22 15:35:25 -07:00 |
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Daniel Torres
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e02c67ed5e
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fixed 32priv tests, now passing
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2022-07-22 15:35:20 -07:00 |
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Katherine Parry
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ee7932c804
|
divider sizes reworked to match book
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2022-07-22 22:02:04 +00:00 |
|
Daniel Torres
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d95b266d49
|
changes to test.vh for compatability
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2022-07-22 15:00:48 -07:00 |
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Daniel Torres
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2bbfd67082
|
added changes to stvec of reference signatures, modified some tests to copy over reference file instead of running on sail
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2022-07-22 14:58:55 -07:00 |
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slmnemo
|
44c30ec082
|
fixed error in tests.vh
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2022-07-22 14:55:55 -07:00 |
|
slmnemo
|
170601af0b
|
Added UART test to peripheral test
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2022-07-22 14:55:34 -07:00 |
|
slmnemo
|
840c40a7ab
|
UART updates and PMA fix
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2022-07-22 14:49:03 -07:00 |
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Daniel Torres
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fbe3a1af12
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-22 13:52:19 -07:00 |
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Daniel Torres
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261b9aa5a1
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commented out embench test that should be commented out
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2022-07-22 13:52:13 -07:00 |
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slmnemo
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49329b3f42
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-07-22 12:36:06 -07:00 |
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slmnemo
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6d8988f71f
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Added test comments to reference output
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2022-07-22 12:35:59 -07:00 |
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slmnemo
|
0d98ff74b4
|
Added PLIC test to regression
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2022-07-22 12:35:37 -07:00 |
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Daniel Torres
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5d7171f6f8
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-22 11:16:09 -07:00 |
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Daniel Torres
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526f70e772
|
commiting current changes to riscof wally tests
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2022-07-22 11:14:04 -07:00 |
|
cturek
|
338f44dfc8
|
Square root negative exponent handling
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2022-07-22 16:45:19 +00:00 |
|
slmnemo
|
12c92a05ff
|
Added new PLIC and UART tests
|
2022-07-22 07:12:55 -07:00 |
|
slmnemo
|
49565f944c
|
Added PLIC and UART tests and new functions to the test library
|
2022-07-22 07:10:39 -07:00 |
|
David Harris
|
07c946bb04
|
Reset MSR on read
|
2022-07-22 04:29:27 +00:00 |
|
Daniel Torres
|
28c61a2191
|
changed gitignore, updated version of arch tests on main build
|
2022-07-21 21:10:15 -07:00 |
|
Daniel Torres
|
f1578936b8
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-21 20:59:01 -07:00 |
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Daniel Torres
|
bd918d37ba
|
added support for new version of riscof and arch tests, now supports tests that can be compiled for both rv32 and rv64
|
2022-07-21 20:58:58 -07:00 |
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slmnemo
|
99dcff80c9
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-07-21 20:35:52 -07:00 |
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slmnemo
|
bfa500234d
|
Fixed UART bug related to parity and MSR/LSR
|
2022-07-21 20:35:46 -07:00 |
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cturek
|
c170a8d9b6
|
Changed testbench to operate on two inputs and one output, changed all test generators, changed srt module to return only one output and take in Mod as a signal to compute integer remainder
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2022-07-22 01:27:08 +00:00 |
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cturek
|
abe1ff906e
|
Renamed variables, moved output handling to postprocessor, added remainder handling
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2022-07-21 20:45:08 +00:00 |
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Daniel Torres
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a17361870f
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-21 12:50:04 -07:00 |
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Daniel Torres
|
d44ec059d0
|
made makefile more specific, just incase future additions
|
2022-07-21 12:50:02 -07:00 |
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Daniel Torres
|
6e9b4f4075
|
removed ugly /ref/Ref from tests.vh, added back d_fsd-align-01.S and d_fld-align-01.S tests to tests.vh, updated makefile to fix the riscof issues and fix fld fsd tests, updated testbench.sv for comptability with changes
|
2022-07-21 12:47:51 -07:00 |
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Katherine Parry
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e330a840b0
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
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2022-07-21 19:38:15 +00:00 |
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Katherine Parry
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270216dd02
|
radix-4 division integrated into srt - not tested
|
2022-07-21 19:38:06 +00:00 |
|
cturek
|
ddc237f6bc
|
Division working too
|
2022-07-21 17:59:10 +00:00 |
|
cturek
|
9c694b887e
|
Updated Radix2 Sqrt to follow new algorithm
|
2022-07-21 17:36:21 +00:00 |
|
Daniel Torres
|
dad913cb82
|
fixed gitmodules
|
2022-07-21 10:15:13 -07:00 |
|
Daniel Torres
|
f33c6c9455
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2022-07-21 10:14:20 -07:00 |
|
Daniel Torres
|
e9aedfdc53
|
changed the default branch of embench
|
2022-07-21 10:14:05 -07:00 |
|
Katherine Parry
|
67c99d3d1a
|
added input enables and improved forwarding
|
2022-07-21 01:20:06 +00:00 |
|
Katherine Parry
|
e8c9830b88
|
turn off 2 word store durring non-fp instructions
|
2022-07-20 21:57:23 +00:00 |
|
Ross Thompson
|
9868e685a4
|
Minor cleanup of cache.
|
2022-07-19 23:04:23 -05:00 |
|