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Author SHA1 Message Date
Alec Vercruysse
61e19c2ddf Make CacheWay flush and dirty logic dependent on !READ_ONLY_CACHE 
To increase coverage. Read-only caches do not have flushes since
they do not have dirty bits.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
d3a988c96c make Cache Flush Logic dependent on !READ_ONLY_CACHE 
read-only caches do not have flush logic since they do not have to
deal with dirty bits.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
247af17b6b remove ClearValid from cache 
The cachefsm hardwired ClearValid logic to zero.
This signal might've been added to potentially add extra functionality
later. Unless that functionality is added, however, it negatively
impacts coverage. If the goal is to maximize coverage, this signal
should be removed and only added when it becomes necessary.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
3867142f10 change i$ cachetagmem from ram1p1rwbe -> ram1p1rwe 
the byte write-enables were always tied high, so we can use
RAM without byte-enable to increase coverage.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
4993b1b426 turn off ce coverage for ram1p1rwe 
According to the textbook, the cache memory chip enable,
`CacheEn`, is only lowered by the cachefsm with it is in the ready
state and a pipeline stall is asserted.

For read only caches, cache writes only occur in the state_write_line
state. So there is no way that a write would happen while the chip
enable is low.

Removing the chip-enable check from this memory to increase coverage
would be a bad idea since if anyone else uses this ram, the behaviour
would be differently than expected. Instead, I opted to turn off
coverage for this statement. Since this ram, which does not have a
byte enable, is used exclusively by read-only caches right now, this
should not mistakenly exclude coverage for other cases, such as D$.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
277f507e9a add ram1p1rwe for read-only cache ways (remove byte-enable) 
- increases coverage
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
c0206cfcb3 fix typo in cachway setValid input comment 2023-04-05 11:48:18 -07:00
Alec Vercruysse
270200bc1c put cacheLRU coverage explanation on another line 
the `: explanation` syntax was not working
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
c41f4d2e7b Exclude CacheLRU log2 function from coverage 2023-04-05 11:48:18 -07:00
David Harris
7373cbb3ff
Merge pull request #201 from ross144/main 
Improved d/i cache loggers
 2023-04-05 06:40:14 -07:00
Ross Thompson
5b188f239b Fixed the d cache logger. 2023-04-04 14:19:19 -05:00
Ross Thompson
b1a805d1f6 Improved d/i cache logger. 2023-04-04 13:38:32 -05:00
Ross Thompson
23ad9f79f0
Merge pull request #199 from davidharrishmc/dev 
Fixed WFI to commit when an interrupt occurs
 2023-04-04 11:34:24 -05:00
David Harris
b7b1f2443f Fixed WFI to commit when an interrupt occurs 2023-04-04 09:32:26 -07:00
David Harris
11230f01ae
Merge pull request #198 from eroom1966/main 
add support for Sstc
 2023-04-04 09:23:38 -07:00
eroom1966
b9ef99530a add support for Sstc 2023-04-04 17:20:00 +01:00
Ross Thompson
c21a5aaaf7
Merge pull request #194 from davidharrishmc/dev 
Bit manipulation support in ImperasDV.  Test improvements.
 2023-04-04 09:13:27 -05:00
David Harris
2466594067
Merge pull request #196 from kipmacsaigoren/zbc_optimize 
bitmanip: simplify zbc input mux
 2023-04-04 06:27:47 -07:00
Kevin Kim
d7deed1690
Merge branch 'openhwgroup:main' into zbc_optimize 2023-04-03 23:45:49 -07:00
Kevin Kim
ce8a401a84 reduced mux3 to mux2 for input signal to clmul 2023-04-03 22:53:46 -07:00
David Harris
57ee9f3a5a Merged priv.S edits 2023-04-03 18:07:14 -07:00
David Harris
77f071dc14 Updated imperas.ic to enable B extension 2023-04-03 17:55:30 -07:00
David Harris
23bf8e0375
Merge pull request #190 from SydRiley/main 
expanded ifu coverage including 4 added directed tests and 1 exclusion, expanded fpu coverage including 6 directed tests and 2 multiline exclusions
 2023-04-03 17:48:47 -07:00
David Harris
43a13ff102
Merge pull request #193 from ACWright256/main 
Hardware performance counterer registers test coverage
 2023-04-03 17:47:06 -07:00
Alexa Wright
803fee5903
Merge branch 'openhwgroup:main' into main 2023-04-03 14:30:54 -07:00
Sydeny
8cfd221444 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-04-03 13:41:55 -07:00
Ross Thompson
91803dc684
Merge pull request #178 from AlecVercruysse/coverage 
Improve I$ coverage by simplifying logic
 2023-04-03 14:22:46 -05:00
David Harris
af8f1ab786 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-03 06:13:16 -07:00
David Harris
0799072556
Merge pull request #189 from kipmacsaigoren/bitmanip_cleanup 
Bitmanip: Removed Comparator Flag to ALU
 2023-04-03 06:04:58 -07:00
Sydeny
7e5e9d928e Manual merge for fctrl.sv, fpu.S, and ifu.S files 2023-04-03 01:55:23 -07:00
Sydeny
58eed1bba2 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-04-03 01:54:27 -07:00
Sydney Riley
440e41bb3e expanded ifu coverage including 4 added directed tests and 1 exclusion, expanded fpu coverage including 6 directed tests and 2 multiline exclusions. 2023-04-02 23:51:34 -07:00
Kevin Kim
03bf8f373f Merge branch 'bitmanip_cleanup' of https://github.com/kipmacsaigoren/cvw into bitmanip_cleanup 2023-04-02 21:14:35 -07:00
Kevin Kim
5e7bbeddd1 removed comparator flag to ALU 2023-04-02 21:14:31 -07:00
Kevin Kim
f35b287e66 signal renaming on bitmanip alu and alu 2023-04-02 18:42:41 -07:00
David Harris
d4b7da34de
Merge pull request #177 from amaiuolo/main 
Integrated tv generation for IFdivsqrt
 2023-04-02 18:29:38 -07:00
Kevin Kim
9a4fa6ce96 changed signal names on clmul and zbc to match book 2023-04-02 18:28:09 -07:00
David Harris
fc158fd6e5
Merge pull request #187 from stineje/main 
Update one bug in testfloat - still have to fix fpdiv but others shou…
 2023-04-02 18:27:39 -07:00
James Stine
e3f3f14216 Update one bug in testfloat - still have to fix fpdiv but others should now all work 2023-04-02 18:16:23 -05:00
Alexa Wright
3815b7117b Added tests for writing and reading to HPMCOUNTERM csrs 2023-04-01 16:02:23 -07:00
David Harris
800fdeb7ad Added SSTC support to imperas.ic and wallyTracer. Fixes many of the privileged tests 2023-03-31 10:54:03 -07:00
David Harris
a8661d139b regression cleanup; unable to run buildroot coverage because of different config file 2023-03-31 09:59:38 -07:00
David Harris
0ccfdde30e Regression update 2023-03-31 09:15:15 -07:00
David Harris
e5653ff351 Merged privileged test 2023-03-31 08:37:16 -07:00
David Harris
03b4f6660c Coverage improvement: ieu, hazard, priv 2023-03-31 08:34:34 -07:00
David Harris
b95730e3a1 Coverage improvements in ieu, hazard units 2023-03-31 08:33:46 -07:00
David Harris
820e3513c7 Privilege test improvements 2023-03-31 08:32:02 -07:00
David Harris
37d289cf44
Merge pull request #180 from infinitymdm/main 
Remove some fpu/fctrl test cases from coverage statistics
 2023-03-31 08:31:08 -07:00
Marcus Mellor
984d4b9918 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-31 10:29:10 -05:00
Mike Thompson
a28a457099
Merge pull request #179 from davidharrishmc/dev 
Fixed broken regression: privileged tests and build root
 2023-03-31 10:56:27 -04:00