Xavi/cvw
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76 Commits

Author SHA1 Message Date
sarah-harris
789fc0e493 Minor fixes in datapath.sv and ieu.sv (comments, putting signals in correct grouping) 2023-01-18 07:26:08 -08:00
David Harris
555fee94fa IEU comment cleanup 2023-01-17 10:51:44 -08:00
David Harris
77766a6dac Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-17 06:47:06 -08:00
David Harris
c8d77d785c IEU signal comment cleanup 2023-01-17 06:47:02 -08:00
sarah-harris
4e9a7a6403 Changing signal name to ImmExtD/E to match figures 
Changing signal name:
ExtImmD/E -> ImmExtD/E

to match figures.
 2023-01-17 06:33:58 -08:00
David Harris
15866cb11d pipelined/src/ieu/ieu.sv 2023-01-17 06:08:26 -08:00
sarah-harris
cb153d74d9 IEU cleanup 
IEU cleanup
 2023-01-17 06:02:26 -08:00
David Harris
768c1bc703 Header comments 2023-01-12 04:35:44 -08:00
Ross Thompson
318ceba34d Improved LSU formating. 2023-01-11 18:52:46 -06:00
sarah-harris
203cc164d9 Added Sarah.Harris@unlv.edu to alu.sv 
Added Sarah.Harris@unlv.edu to alu.sv
 2023-01-11 15:20:41 -08:00
David Harris
8c6ddcc15b changed name to CORE-V-WALLY 2023-01-11 15:15:08 -08:00
David Harris
3ea4dd4898 Changed Wally to CORE-V Wally 2023-01-11 14:03:44 -08:00
David Harris
d1bfdddd8c Rename FP and FPU to F in signal names 2023-01-11 11:46:36 -08:00
David Harris
654abcde61 Replaced MDUE with IntDivE in FDIVSQRT 2023-01-11 11:06:37 -08:00
David Harris
739c2c8322 Changed MIT license to Solderpad License 2023-01-10 11:35:20 -08:00
David Harris
8506f120e1 Remove unused signals 2023-01-07 05:46:22 -08:00
David Harris
44352ced64 Branch logic simplification and remove unused signals 2023-01-07 05:42:34 -08:00
David Harris
f8af51e07b Handle special case Int Div/Rem of |A| < |B| in a single cycle 2023-01-01 13:54:01 -08:00
David Harris
10af4e4353 ALU cleanup 2022-12-24 07:18:35 -08:00
Ross Thompson
b4c7998ded DON'T USE. First commit in attempt to move fpustall detection into the decode stage. 2022-12-23 12:47:18 -06:00
Ross Thompson
ca67e5588d Removed unnecessary stall when MatchDE was driven 1 by RdE == 0. 2022-12-23 11:45:42 -06:00
David Harris
8f640f050f IFU mux for CSRWriteFenceM conditional on ZICSR/ZIFENCEI 2022-12-20 15:38:30 -08:00
Ross Thompson
35ad49502f Implement FENCE.I as NOP when ZIFENCEI is not supported. 2022-12-20 17:34:11 -06:00
Ross Thompson
e774dd2db9 Reworked the hazards to eliminate StallFCause. Flush and CSRWrites now flush F,D,E stages and set the correct PCNextF in the M stage. 2022-12-15 09:53:35 -06:00
David Harris
33aca5d35e Added IDIV_ON_FPU flag to control whether integer division uses FPU 2022-12-15 06:37:55 -08:00
David Harris
5f637ef4a7 Use FPU divider for integer division when F is supported 2022-12-14 17:03:13 -08:00
David Harris
9395414df3 Renamed FPUStallD to FCvtIntStallD 2022-12-02 11:55:23 -08:00
David Harris
f08d5b23d5 Eliminated store after store stall when no cache; simplified divshiftcalc logic. 2022-09-21 13:02:34 -07:00
Ross Thompson
c6927d2ace Modified the lsu/ifu memory configurations. 2022-08-24 12:35:15 -05:00
David Harris
8b2e368805 Only stall FPU to IEU on convert instructions with dependencies 2022-08-23 12:57:18 -07:00
David Harris
113258a0d0 Cleaned up fcvt selection control to IEU and FPUIllegalInst signals 2022-08-23 12:17:19 -07:00
David Harris
69be6d0873 Simplify IEU-FP datapath 2022-08-23 11:16:36 -07:00
David Harris
34eece10b8 Finished FPU-LSU interface cleanup 2022-08-22 13:43:04 -07:00
David Harris
2170203847 Simplified FPU-LSU interface to skip IEU 2022-08-22 13:28:51 -07:00
David Harris
564281b8c1 Removed 2-cycle FPU-IEU latency stall 2022-08-22 16:14:15 +00:00
David Harris
b91f33372e Commented out unused comparators 2022-08-22 08:28:28 +00:00
Katherine Parry
6baded9121 added rv32 double precision stores - untested 2022-06-28 21:33:31 +00:00
Madeleine Masser-Frye
0161683945 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-06-21 20:31:06 +00:00
Madeleine Masser-Frye
fe31ee92e8 switched comparator to dc flip version 2022-06-21 20:30:33 +00:00
Katherine Parry
254ebf478e added fld in rv32 - needs testing 2022-06-20 22:53:13 +00:00
Katherine Parry
31fd8772cf postprocessing unit created and passing all tests 2022-06-13 22:47:51 +00:00
David Harris
1d8bc2dc1b Added stalls for pending SFENCE.VMA and FENCE.I in hazard unit 2022-06-02 09:37:59 -07:00
David Harris
faa15b1f8d Cleaned up comments in controller 2022-06-02 15:48:33 +00:00
David Harris
4237bb7abd Added comments to some files, added a+b = 0 detector to comparator.sv 2022-05-28 09:41:48 +00:00
David Harris
e81e530f68 More signal cleanup 2022-05-12 15:39:44 +00:00
David Harris
4edf9b6355 More unused signal cleanup 2022-05-12 15:15:30 +00:00
David Harris
1f761c4e06 PPA script progress 2022-05-11 18:11:51 +00:00
David Harris
4b91fddc0a Illegal instruction fault when running FPU instruction with STATUS_FS = 0 2022-05-03 18:32:01 +00:00
David Harris
1166c40059 FPU generates illegal instruction if MSTATUS.FS = 00 2022-05-03 11:56:31 +00:00
David Harris
bcd8728b3e Switched to behavioral comparator for best PPA 2022-05-03 11:00:39 +00:00