Ross Thompson
42828e6ec4
Simplified gshare.
2023-01-30 19:27:18 -06:00
Ross Thompson
4cbefd9834
Minor gshare optimization.
2023-01-30 18:13:12 -06:00
Ross Thompson
cc48cdc97b
Imperas found a real bug in virtual memory.
...
If the instruction address spilled across two pages and the second page misses the TLB,
the HPTW received a tlb miss at the address of the first page rather than the second.
After the walk the TLB was updated with the PTE from the first page at the address of the
second page.
Example bug
Instruction PCF = 0x2ffe
First page in 0x2ffe and second page in 0x3000.
The second page misses the TLB and generates HPTW request at 0x2ffe rather than 0x3000.
TLB is updated with PTE from 0x2ffe at 0x3000.
2023-01-30 11:47:51 -06:00
Ross Thompson
6040a45698
optimized branch predictor by removing unnecessary registers.
2023-01-29 22:39:37 -06:00
Ross Thompson
392716a608
Updated global history branch predictcor with the gshare improvements.
2023-01-29 16:26:44 -06:00
Ross Thompson
a9a7054e2f
Merge branch 'main' of https://github.com/openhwgroup/cvw
...
This merges the branch predictor improvements into the main repo.
2023-01-29 15:24:20 -06:00
Ross Thompson
d6ae1156d0
gshare cleanup.
2023-01-29 15:07:45 -06:00
Ross Thompson
ef874f3409
Gshare cleanup.
2023-01-29 15:06:35 -06:00
Ross Thompson
74b4f78099
Found bug in gshare.
2023-01-29 15:03:25 -06:00
Ross Thompson
1044c290c2
Fixed bug with the btb's valid bit not beind held on a stall.
2023-01-29 00:49:23 -06:00
Ross Thompson
f93eaeef8e
Fixed another bug with the speculative gshare with instruction class prediction.
2023-01-29 00:33:40 -06:00
David Harris
481cb8bad0
Renamed BPTYPE to BPRED_TYPE
2023-01-28 20:06:12 -08:00
David Harris
94daedeed6
Renamed DCACHE to DCACHE_SUPPORTED and ICACHE to ICACHE_SUPPORTED
2023-01-28 18:52:00 -08:00
David Harris
e4e7e827d6
Renamed BUS to BUS_SUPPORTED
2023-01-28 18:35:53 -08:00
David Harris
a0b4e7fb24
Config cleanup and renamed BPRED_ENABLED to BPRED_SUPPORTED
2023-01-28 18:17:42 -08:00
David Harris
33143e5958
Fixed typo in ram2p1r1wbe_1024x69 and renamed for consistency
2023-01-28 18:07:33 -08:00
David Harris
1bb1fc7604
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-01-28 17:55:08 -08:00
James Stine
a1d892703c
Modified changes as follows
...
* Add docs directory for Docker including Dockerfile
* Change to synthesis script to include fpu stuff
* Add wrappers for IP (may need some cleanup but will cleanup shortly)
2023-01-28 19:33:00 -06:00
Ross Thompson
f6aafd6bad
Fixed bug with the new csr.
2023-01-28 17:56:56 -06:00
Ross Thompson
6371d91b37
Added another performance counter to track overall branch miss-predictions.
2023-01-28 17:50:46 -06:00
Ross Thompson
57deb68fb3
Found an issue where the btb was not forwarding the valid bit!
2023-01-28 17:00:50 -06:00
Ross Thompson
6d9c463893
Possible workign instruction class prediction repair.
2023-01-28 16:42:19 -06:00
Ross Thompson
8a277f6b75
Possible fix for speculative gshare.
2023-01-28 16:14:19 -06:00
David Harris
08124b917f
Comment cleanup in subcachelineread
2023-01-28 11:00:05 -08:00
David Harris
0f5df3340f
removed unused memory model
2023-01-28 10:58:36 -08:00
David Harris
f9cfa7cdc2
Updated cvw to be consistent with configs
2023-01-28 10:58:02 -08:00
David Harris
6603cd9e09
Removed unneeded lint directive from core
2023-01-27 15:48:30 -08:00
David Harris
eaab1bfad4
Use CVW configuration in top-level
2023-01-27 15:47:36 -08:00
David Harris
3fea392875
Removed unused BMU, added CVW configuration
2023-01-27 15:47:15 -08:00
Ross Thompson
6d75e3c22b
Clarified gshare bp.
2023-01-27 16:40:20 -06:00
David Harris
3906e706fd
Removed integer from localparams
2023-01-27 14:40:06 -08:00
David Harris
5a81a26c9e
Removed int/integer from parameters)
2023-01-27 14:27:04 -08:00
Ross Thompson
857004c3a3
Removed pessimistic x propagation issue for wally32priv test in the branch predictor.
2023-01-27 15:28:31 -06:00
Ross Thompson
c1ae7c068e
Found issue with branch predictor.
2023-01-27 13:13:55 -06:00
David Harris
4b196736a5
Renamed ram2p1rw1be to match modeule name
2023-01-27 09:54:50 -08:00
Ross Thompson
a212960352
Very hacky. But I think gshare is now correct with respect to repair on instruction class miss prediction.
2023-01-27 11:34:45 -06:00
David Harris
767cfdc8a5
Fixed typo in bpred preventing compiling
2023-01-27 05:55:53 -08:00
David Harris
c2139eba93
renamed brpred to bpred
2023-01-27 05:55:31 -08:00
David Harris
947713f1f3
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-01-26 14:52:25 -08:00
Ross Thompson
4fa2dcc2a5
Changed the performance counters to track different data.
...
Now rather than tracking jump(r) we track jump(r) and taken branches.
2023-01-26 13:21:28 -06:00
Ross Thompson
6025bbc9ae
Fixed another bug with the compressed instruction class decode.
2023-01-26 12:19:33 -06:00
Ross Thompson
a8d5ba1ea4
Fixed compressed branch class decode.
2023-01-26 11:07:47 -06:00
Ross Thompson
3577220625
Improved no class prediction mode.
2023-01-26 10:54:43 -06:00
Ross Thompson
19a964325a
Modified the RAS to correctly repair itself.
2023-01-25 23:33:03 -06:00
Ross Thompson
3dc441ff8c
Intermediate commit. Passes regression tests, but RAS is not correct.
2023-01-25 19:39:18 -06:00
Ross Thompson
63617b56cf
Fixed typos.
2023-01-25 18:51:09 -06:00
Ross Thompson
3b4d49a358
RAS is now compliant with our header and documentation guide.
2023-01-25 17:18:07 -06:00
Ross Thompson
5da1aeeef1
Improved RAS again.
2023-01-25 17:10:52 -06:00
Ross Thompson
2f0e40402b
Improved RAS.
2023-01-25 17:06:25 -06:00
Ross Thompson
724ae13cc2
More branch predictor improvements.
2023-01-25 16:03:02 -06:00
