forked from Github_Repos/cvw
removed unused memory model
This commit is contained in:
parent
f9cfa7cdc2
commit
0f5df3340f
@ -1 +0,0 @@
|
||||
/proj/wally/memory/ts1n28hpcpsvtb64x128m4sw_180a/VERILOG/ts1n28hpcpsvtb64x128m4sw_180a_tt1v25c.v
|
Loading…
Reference in New Issue
Block a user