forked from Github_Repos/cvw
Possible workign instruction class prediction repair.
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8a277f6b75
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@ -52,7 +52,7 @@ module speculativegshare
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logic [1:0] NewDirPredictionF, NewDirPredictionD, NewDirPredictionE;
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logic [k-1:0] GHRF, OldGHRF;
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logic OldGHRExtraF;
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logic GHRExtraF;
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logic [k-1:0] GHRD, OldGHRE, GHRE, GHRM, GHRW;
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logic [k-1:0] GHRNextF;
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logic [k-1:0] GHRNextD;
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@ -113,30 +113,28 @@ module speculativegshare
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always_comb begin
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if(FlushD) begin
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//if(BranchInstrE) GHRNextF = {PCSrcE, GHRNextD[k-1:1]};
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//else GHRNextF = GHRNextD[k-1:0];
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GHRNextF = GHRNextD[k-1:0];
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end else if(BranchInstrF) GHRNextF = {DirPredictionF[1], GHRF[k-1:1]};
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else GHRNextF = GHRF;
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end
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flopenr #(k) GHRFReg(clk, reset, (~StallF) | FlushD, GHRNextF, GHRF);
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//flopenr #(k) GHRFReg(clk, reset, (~StallF) | FlushD, GHRNextF, OldGHRF);
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//flopenr #(1) GHRFExtraReg(clk, reset, (~StallF) | FlushD, GHRNextF[0], OldGHRExtraF);
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// assign GHRF = WrongPredInstrClassD[0] & BranchInstrD ? {DirPredictionD[1], OldGHRF[k-1:1]} : // shift right
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// WrongPredInstrClassD[0] & ~BranchInstrD ? {OldGHRF[k-2:0], OldGHRExtraF}: // shift left
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// OldGHRF[k-1:0];
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//assign GHRNextD = FlushD ? {GHRNextE} : {DirPredictionF[1], GHRF[k-1:1]};
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assign GHRNextD = FlushD ? GHRNextE[k-1:0] : GHRF[k-1:0];
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flopenr #(1) GHRFExtraReg(clk, reset, (~StallF) | FlushD, GHRF[0], GHRExtraF);
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// use with out instruction class prediction
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//assign GHRNextD = FlushD ? GHRNextE[k-1:0] : GHRF[k-1:0];
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// with instruction class prediction
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assign GHRNextD = FlushD ? GHRNextE[k-1:0] :
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WrongPredInstrClassD[0] & BranchInstrD ? {DirPredictionD[1], GHRF[k-1:1]} : // shift right
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WrongPredInstrClassD[0] & ~BranchInstrD ? {OldGHRF[k-2:0], GHRExtraF}: // shift left
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GHRF[k-1:0];
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flopenr #(k) GHRDReg(clk, reset, (~StallD) | FlushD, GHRNextD, GHRD);
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assign GHRNextE = DirPredictionWrongE & BranchInstrE & ~FlushM ? {PCSrcE, GHRD[k-2:0]} : // if the branch is not flushed and was mispredicted
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assign GHRNextE = BranchInstrE & ~FlushM ? {PCSrcE, GHRD[k-2:0]} : // if the branch is not flushed
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FlushE ? GHRNextM : // branch is flushed
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GHRD;
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flopenr #(k) GHREReg(clk, reset, (~StallE) | FlushE, GHRNextE, GHRE);
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//assign GHRE = BranchInstrE ? {PCSrcE, OldGHRE[k-1:0]} : OldGHRE;
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assign GHRNextM = FlushM ? GHRNextW : GHRE;
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flopenr #(k) GHRMReg(clk, reset, (~StallM) | FlushM, GHRNextM, GHRM);
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