forked from Github_Repos/cvw
Config cleanup and renamed BPRED_ENABLED to BPRED_SUPPORTED
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@ -128,7 +128,7 @@
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`define PLIC_UART_ID 10
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`define PLIC_GPIO_ID 3
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`define BPRED_ENABLED 1
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`define BPRED_SUPPORTED 1
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`define BPTYPE "BPGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE
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`define TESTSBP 0
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`define BPRED_SIZE 10
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@ -71,7 +71,7 @@
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`define IDIV_ON_FPU 1
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// Legal number of PMP entries are 0, 16, or 64
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`define PMP_ENTRIES 64
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`define PMP_ENTRIES 16
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// Address space
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`define RESET_VECTOR 64'h0000000000001000
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@ -139,7 +139,7 @@
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`define TWO_BIT_PRELOAD "../config/fpga/twoBitPredictor.txt"
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`define BTB_PRELOAD "../config/fpga/BTBPredictor.txt"
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`define BPRED_ENABLED 1
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`define BPRED_SUPPORTED 1
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`define BPTYPE "BPSPECULATIVEGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE or BPSPECULATIVEGLOBAL or BPSPECULATIVEGSHARE or BPOLDGSHARE or BPOLDGSHARE2
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`define TESTSBP 1
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`define BPRED_SIZE 10
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@ -69,7 +69,7 @@
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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`define IDIV_BITSPERCYCLE 1
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`define IDIV_ON_FPU 1
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`define IDIV_ON_FPU 0
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// Legal number of PMP entries are 0, 16, or 64
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`define PMP_ENTRIES 0
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@ -132,7 +132,7 @@
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`define PLIC_GPIO_ID 3
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`define PLIC_UART_ID 10
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`define BPRED_ENABLED 0
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`define BPRED_SUPPORTED 0
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`define BPTYPE "BPGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE
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`define TESTSBP 0
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`define BPRED_SIZE 10
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@ -68,7 +68,7 @@
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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`define IDIV_BITSPERCYCLE 4
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`define IDIV_ON_FPU 1
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`define IDIV_ON_FPU 0
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// Legal number of PMP entries are 0, 16, or 64
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`define PMP_ENTRIES 16
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@ -131,7 +131,7 @@
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`define PLIC_GPIO_ID 3
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`define PLIC_UART_ID 10
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`define BPRED_ENABLED 1
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`define BPRED_SUPPORTED 1
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`define BPTYPE "BPGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE
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`define TESTSBP 0
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`define BPRED_SIZE 10
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@ -69,10 +69,10 @@
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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`define IDIV_BITSPERCYCLE 4
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`define IDIV_ON_FPU 1
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`define IDIV_ON_FPU 0
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// Legal number of PMP entries are 0, 16, or 64
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`define PMP_ENTRIES 64
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`define PMP_ENTRIES 0
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// Address space
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`define RESET_VECTOR 32'h80000000
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@ -132,7 +132,7 @@
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`define PLIC_GPIO_ID 3
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`define PLIC_UART_ID 10
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`define BPRED_ENABLED 1
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`define BPRED_SUPPORTED 0
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`define BPTYPE "BPGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE
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`define TESTSBP 0
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`define BPRED_SIZE 10
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@ -68,7 +68,7 @@
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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`define IDIV_BITSPERCYCLE 4
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`define IDIV_ON_FPU 1
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`define IDIV_ON_FPU 0
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// Legal number of PMP entries are 0, 16, or 64
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`define PMP_ENTRIES 0
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@ -131,7 +131,7 @@
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`define PLIC_GPIO_ID 3
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`define PLIC_UART_ID 10
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`define BPRED_ENABLED 1
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`define BPRED_SUPPORTED 0
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`define BPTYPE "BPGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE
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`define TESTSBP 0
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`define BPRED_SIZE 10
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@ -72,7 +72,7 @@
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`define IDIV_ON_FPU 1
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// Legal number of PMP entries are 0, 16, or 64
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`define PMP_ENTRIES 64
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`define PMP_ENTRIES 16
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// Address space
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`define RESET_VECTOR 64'h0000000080000000
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@ -134,7 +134,7 @@
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`define PLIC_GPIO_ID 3
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`define PLIC_UART_ID 10
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`define BPRED_ENABLED 1
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`define BPRED_SUPPORTED 1
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`define BPTYPE "BPGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE
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`define TESTSBP 0
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`define BPRED_SIZE 10
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@ -134,7 +134,7 @@
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`define PLIC_GPIO_ID 3
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`define PLIC_UART_ID 10
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`define BPRED_ENABLED 1
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`define BPRED_SUPPORTED 1
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//`define BPTYPE "BPSPECULATIVEGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE or BPSPECULATIVEGLOBAL or BPSPECULATIVEGSHARE or BPOLDGSHARE or BPOLDGSHARE2
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`define BPTYPE "BPSPECULATIVEGLOBAL" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE or BPSPECULATIVEGLOBAL or BPSPECULATIVEGSHARE or BPOLDGSHARE or BPOLDGSHARE2
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//`define BPTYPE "BPFOLDEDGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE or BPSPECULATIVEGLOBAL or BPSPECULATIVEGSHARE or BPOLDGSHARE or BPOLDGSHARE2
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@ -69,7 +69,7 @@
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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`define IDIV_BITSPERCYCLE 4
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`define IDIV_ON_FPU 1
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`define IDIV_ON_FPU 0
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// Legal number of PMP entries are 0, 16, or 64
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`define PMP_ENTRIES 0
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@ -134,7 +134,7 @@
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`define PLIC_GPIO_ID 3
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`define PLIC_UART_ID 10
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`define BPRED_ENABLED 0
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`define BPRED_SUPPORTED 0
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`define BPTYPE "BPGSHARE" // BPLOCALPAg or BPGLOBAL or BPTWOBIT or BPGSHARE
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`define TESTSBP 0
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`define BPRED_SIZE 10
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@ -322,7 +322,7 @@ module ifu (
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////////////////////////////////////////////////////////////////////////////////////////////////
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// Branch and Jump Predictor
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////////////////////////////////////////////////////////////////////////////////////////////////
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if (`BPRED_ENABLED) begin : bpred
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if (`BPRED_SUPPORTED) begin : bpred
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bpred bpred(.clk, .reset,
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.StallF, .StallD, .StallE, .StallM, .StallW,
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.FlushD, .FlushE, .FlushM, .FlushW,
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@ -99,7 +99,7 @@ package cvw;
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// parameter PLIC_NUM_SRC_LT_32 = `PLIC_NUM_SRC_LT_32;
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parameter PLIC_GPIO_ID = `PLIC_GPIO_ID;
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parameter PLIC_UART_ID = `PLIC_UART_ID;
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parameter BPRED_ENABLED = `BPRED_ENABLED;
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parameter BPRED_SUPPORTED = `BPRED_SUPPORTED;
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parameter BPTYPE = `BPTYPE;
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parameter TESTSBP = `TESTSBP;
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parameter BPRED_SIZE = `BPRED_SIZE;
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@ -465,7 +465,7 @@ logic [3:0] dummy;
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.done(DCacheFlushDone));
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// initialize the branch predictor
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if (`BPRED_ENABLED == 1)
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if (`BPRED_SUPPORTED == 1)
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begin
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genvar adrindex;
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@ -219,7 +219,7 @@ module testbench;
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.done(DCacheFlushDone));
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// initialize the branch predictor
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if (`BPRED_ENABLED == 1)
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if (`BPRED_SUPPORTED == 1)
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begin
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genvar adrindex;
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