104 Commits

Author	SHA1	Message	Date
Rose Thompson	626b89320c	More cleanup.	2023-12-29 16:51:39 -06:00
Rose Thompson	0264a17f77	Reverted dtim to use store delay stall, but only (load after store).	2023-12-29 16:06:30 -06:00
Rose Thompson	fbab9f6c6d	Updated comments about AMO and CMO stalls.	2023-12-29 15:31:11 -06:00
David Harris	2c2f692f3a	Moved forwarding logic into controller	2023-12-26 21:17:01 -08:00
Rose Thompson	438451ee02	Fixed the AMO hazard.	2023-12-15 11:55:54 -06:00
Rose Thompson	1ca9a8be6d	I think I solved the AMO/store hazard issue introduced by removing the store delay hazard.	2023-12-14 16:31:02 -06:00
Rose Thompson	a7f0aaa722	Added comments to finish store delay stall removal.	2023-12-13 20:35:13 -06:00
Rose Thompson	f3d43a7713	Progress on reducing store stall in d cache.	2023-12-13 15:34:21 -06:00
Rose Thompson	13bb5d845b	On the way to solving the store delay hazard.	2023-12-13 10:39:01 -06:00
Rose Thompson	80336493f5	Cleaned up redundant ZICBOM/Z_SUPPORTED.	2023-11-29 15:20:49 -06:00
Rose Thompson	69653e5faa	Fixed minor bug in the cbo hazard logic.	2023-11-27 23:38:53 -06:00
David Harris	d3ce683e06	Removed other unused signals from Verilog	2023-11-20 23:37:56 -08:00
David Harris	e75ceb044f	Improved tlb and controller coverage; fixed exclusions on broken lines	2023-08-31 00:27:47 -07:00
David Harris	f7b50f4721	Preparing to merge with CBO* changes	2023-08-25 18:41:03 -07:00
Ross Thompson	21129dde71	Fixed cbo instruction decode.	2023-08-18 11:32:30 -05:00
Ross Thompson	9dcc70d6c1	Updated the hazard logic for CMO operations.	2023-08-17 17:58:49 -05:00
Ross Thompson	12beada55b	Fixed the privilege decoder bug which prevented the fpga linux boot.	2023-07-10 17:00:06 -05:00
David Harris	afe66d0ee4	Added prefetch instructions; sent cbo instructions to LSU	2023-07-02 10:55:35 -07:00
David Harris	723b8266cb	Added prefetch signals	2023-07-02 10:06:58 -07:00
David Harris	482e4e6e92	Enhanced decoder to produce individual CMOpE output for the 4 CMO instructions	2023-07-02 09:35:05 -07:00
David Harris	b6ae5661b4	Added environment configuration control (menvcfg/senvcfg) of cbo instructions	2023-07-02 01:52:25 -07:00
David Harris	15314a9c9a	Gated floating-point load/stores with STATUS_FS and added initial decoding for Cache Management Operations	2023-07-02 00:34:30 -07:00
David Harris	41e9f20943	improved decoder checking atomic and RW and MW and privileged instructions	2023-07-02 00:02:03 -07:00
David Harris	e34ef4d636	improved decoder checking atomic instructions	2023-07-01 23:10:57 -07:00
David Harris	d930be332e	Improved instruction decoding for illegal floating-point loads/stores and fences	2023-07-01 22:48:04 -07:00
David Harris	c383407d5c	Removed redundant and not-covered atomic check from StoreStallD	2023-06-16 16:05:53 -07:00
David Harris	9e839988dc	Gated MDU to save power; doesn't seem to have affected simulation time	2023-06-15 12:17:23 -07:00
David Harris	a62211bad1	Gated inputs to BMU when inactive to save power and simulation time	2023-06-15 11:56:59 -07:00
Ross Thompson	b91b54589e	Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down.	2023-05-24 14:05:44 -05:00
Limnanthes Serafini	034c289a36	Misc typo and indent fixing.	2023-04-13 16:54:15 -07:00
David Harris	4e2d80476e	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-04-03 06:13:16 -07:00
Kevin Kim	8252706691	removed comparator flag to ALU	2023-04-02 21:14:31 -07:00
David Harris	fd0c9e973d	Coverage improvements in ieu, hazard units	2023-03-31 08:33:46 -07:00
Alec Vercruysse	46df428e56	add check for legal funct3 for IW instructions	2023-03-28 15:59:48 -07:00
Ross Thompson	46b1bca4fc	Fixed all tap/space issue in RTL.	2023-03-24 17:32:25 -05:00
David Harris	576545e328	ALUControl Elimination	2023-03-24 08:10:48 -07:00
David Harris	f648be8ee2	Merged ALUOp into ALUControl to simplify ALU mux	2023-03-24 07:28:42 -07:00
David Harris	e8d6073eca	BMU simplifications	2023-03-24 06:18:06 -07:00
Kevin Kim	fce62fc213	formatting	2023-03-22 10:26:04 -07:00
Kevin Kim	3f46dff23e	Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip	2023-03-21 11:20:05 -07:00
Kevin Kim	b394e343f6	format + min/max structural mux	2023-03-20 09:37:57 -07:00
David Harris	6922298f21	Replaced FenceM with InvalidateICacheM for event counting of fence.i	2023-03-18 09:24:31 -07:00
Kevin Kim	0ca530fffd	Merge branch 'bit-manip' into illegal_specific	2023-03-07 14:07:59 -08:00
Kevin Kim	26cb1857f3	specifc instruction handling for B's ... - Added BALUSrcBD, BaseALUSrcB for distinguishing between base instruction I/IW and Bitmanip instruction I/IW	2023-03-07 13:58:08 -08:00
Kip Macsai-Goren	2ec3c741ef	Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip	2023-03-07 13:44:51 -08:00
Kip Macsai-Goren	f178c90c02	Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip	2023-03-07 13:44:19 -08:00
Kevin Kim	bd9b9970f5	Merge remote-tracking branch 'origin' into illegal_specific	2023-03-07 11:30:36 -08:00
Kevin Kim	81198ce6f6	reverted backing to working version	2023-03-07 00:29:58 -08:00
Kevin Kim	5637897dce	reverted to working version	2023-03-07 00:28:07 -08:00
David Harris	7ecf4cdea8	Fixed bug about rv64 shifts only using 6 bits of funct7	2023-03-06 13:10:51 -08:00