Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-01-24 13:34:28 +00:00
Code Issues Packages Projects Releases Wiki Activity
8,632 Commits 4 Branches 2 Tags 52 MiB
e8f5545076
Commit Graph

8632 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Rose Thompson
e8f5545076 Got imperasDV running linux simulation again. 
Now need to merge do files.
 2024-05-13 16:43:13 -05:00
Rose Thompson
ada7c0c9e4
Merge pull request #794 from davidharrishmc/dev 
Regression fully running
 2024-05-13 12:03:21 -05:00
David Harris
d4ac53f000 commented legal TEST options 2024-05-13 07:22:30 -07:00
David Harris
75c10bddfa Moved case.sh to tests/fp 2024-05-13 07:12:16 -07:00
David Harris
d0dad1d9f6 Fixed testbench_fp to use modified unpacker 2024-05-12 12:11:48 -07:00
David Harris
e87a269f59 Fix fcvt.lu.s bug and lint issue in packoutput 2024-05-12 11:31:27 -07:00
David Harris
380d88fc68 Merged config-shared after fma fix 2024-05-12 11:10:55 -07:00
David Harris
7206f90e86
Merge pull request #793 from kparry4/main 
fixed fma testfloat issue #578
 2024-05-11 22:36:56 -07:00
David Harris
009d251433 Fixed cvtint bug by adding 2 bits to convert width; initial implementation of fround passes basic regression but fails some nightly regression cases 2024-05-11 22:32:51 -07:00
David Harris
c0743a1fcf Added missing convert F to/from Int64 tests for arch64f 2024-05-11 02:29:47 -07:00
Katherine Parry
807ef44772 fixed fma testfloat issue #578 2024-05-10 18:12:11 -07:00
David Harris
53d6b96237 Increased NORMSHIFTSZ by 2 to fix failing testfloat cvtint with IDIV_ON_FPU=0, FLEN=32, XLEN=64 2024-05-10 13:42:52 -07:00
David Harris
99bba7340c
Merge pull request #792 from ross144/main 
Fixes the wavefile, testbench, wsim, and wally.do to correctly support function tracking the wavefile.
 2024-05-10 12:41:50 -07:00
Rose Thompson
ceb31fec68 Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-10 08:54:23 -05:00
Rose Thompson
171056f185
Merge pull request #791 from davidharrishmc/dev 
Simulation fixes
 2024-05-10 08:54:15 -05:00
Rose Thompson
b027fa44ef Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-10 08:53:00 -05:00
Rose Thompson
4bd5d334df Modified testbench so it instantiates the function logger if DEBUG is greater than 0 rather than just 1. 2024-05-10 08:51:59 -05:00
Rose Thompson
10b08f8039 Updated brach predictor names to more logical names and match textbook. 2024-05-10 08:51:12 -05:00
Rose Thompson
93ea5b0c1e Fixed wavefile to have function logger. 2024-05-10 08:50:42 -05:00
David Harris
b11a8ae926 Fixed linker to put rventrypoint at 0x80000000 in examples 2024-05-10 05:45:12 -07:00
David Harris
66b33c09be Added Zaamo and Zalrsc support to testbench and regression 2024-05-10 05:41:00 -07:00
David Harris
04457d49f7 Updated sim-testfloat-verilator to use wsim 2024-05-10 05:03:24 -07:00
David Harris
54750ae4d5 Fixed out-of-bound vector accesses in testbench_fp when FLEN < Q_LEN 2024-05-09 19:52:37 -07:00
David Harris
61e559606e Fixed wsim to be able to invoke TestFloat with Verilator. However, TestFloat produces incorrect results with Verilator 2024-05-09 18:56:59 -07:00
Rose Thompson
cfea047306
Merge pull request #790 from davidharrishmc/dev 
Many small fixes
 2024-05-09 11:30:01 -05:00
David Harris
a89e064d1d Run both Questa and VCS during nightly regression 2024-05-09 08:20:44 -07:00
David Harris
bdd0043cd1 Testbench terminates buildroot sim at instruction limit 2024-05-09 07:58:53 -07:00
David Harris
47af54b131 Fixed buildroot prematurely terminating in VCS 2024-05-09 07:29:45 -07:00
David Harris
ce5390de9c Fixed UNCORE_RAM_RANGE for rv64i so VCS doesn't choke 2024-05-08 19:29:36 -07:00
David Harris
0d1d59a3d8 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-05-08 18:58:01 -07:00
David Harris
3aedc773f3
Merge pull request #787 from Divya2030/main 
VCS run regression-wally,  and  Code Coverage
 2024-05-08 18:55:55 -07:00
David Harris
3c86d3d8e0 Run testfloat during nightly regression 2024-05-08 08:08:58 -07:00
Divya2030
5bc7314f63
Merge branch 'openhwgroup:main' into main 2024-05-08 05:25:59 -07:00
Divya2030
eff2264752 Code Coverage Text format for each test and configuration in IndividualCovReport 2024-05-08 05:24:24 -07:00
Divya2030
b4b88c5858 VCS regression & Code Coverage 2024-05-08 04:39:42 -07:00
Divya2030
31ae18922b regression_wally vcs run works 2024-05-08 04:25:03 -07:00
David Harris
77137f0f60 ZAAMO and ZALRSC implemented but not tested 2024-05-07 16:45:49 -07:00
David Harris
fcd75fd6b6 Fixed shiftcorrection typo causing failure on testfloat fcvt tests 2024-05-07 14:27:44 -07:00
David Harris
9d4a3d7d05 Started adding testbplan 2024-05-07 14:11:40 -07:00
David Harris
927f166e1f Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-05-07 12:58:40 -07:00
David Harris
b48b4f4e81
Merge pull request #781 from Divya2030/main 
VCS Simulation Passed
 2024-05-07 12:55:28 -07:00
Divya2030
a3f1a274d2 VCS Simulation Passed 2024-05-07 10:41:02 -07:00
David Harris
37fc45cd35 Updated Questa wally.do to terminate on a compile error 2024-05-06 11:28:00 -07:00
Rose Thompson
8c3cbede40
Merge pull request #777 from davidharrishmc/dev 
directed coverage tests, vcs partially running
 2024-05-06 09:51:40 -05:00
David Harris
025e65ce1a Removed unnecessary printing from extract_arch_vectors 2024-05-06 06:28:15 -07:00
David Harris
36b80ac2b2 Don't run verificaiton tests during top-level Makefile 2024-05-06 04:54:46 -07:00
David Harris
c8269c34a5 Changed error to warning 2024-05-06 03:50:17 -07:00
David Harris
09c602d03d Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-05-06 03:48:50 -07:00
David Harris
064b0a60bc Name cleanups 2024-05-04 03:27:39 -07:00
David Harris
06d3591a15 Divy's change for VCS signature checking 2024-05-04 02:45:43 -07:00