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Merge pull request #792 from ross144/main

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Fixes the wavefile, testbench, wsim, and wally.do to correctly support function tracking the wavefile.
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David Harris 2024-05-10 12:41:50 -07:00 committed by GitHub
commit 99bba7340c
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6 changed files with 29 additions and 14 deletions
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2
bin/wsim
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@ -59,7 +59,7 @@ if (args.sim == "questa"):
if (args.coverage):
cmd += " -coverage"
if (args.gui): # launch Questa with GUI; add +acc to keep variables accessible
cmd = cd + "; vsim -do \"" + cmd + " +acc\""
cmd = cd + "; vsim -do \"" + cmd + " +acc -GDEBUG=1\""
else: # launch Questa in batch mode
cmd = cd + "; vsim -c -do \"" + cmd + "\""
print("Running Questa with command: " + cmd)

27
sim/questa/wally.do
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@ -62,14 +62,17 @@ for {set i 0} true {incr i} {
}
if {$argc >= 3} {
if {[lindex $lst [expr { [llength $lst] -1 } ]] eq "+acc"} {
echo "got at least 3 args"
set AccPosition [lsearch $lst "+acc"]
echo $AccPosition
if {$AccPosition != -1} {
set GUI 1
set accFlag "+acc"
set tbArgs [lrange $lst 0 end-1]
set tbArgs [lreplace $lst $AccPosition $AccPosition]
} else {
set tbArgs $lst
}
set tbArgsLst [split $lst " "]
set tbArgsLst [split $tbArgs " "]
set index [lsearch -exact $tbArgsLst "-coverage"]
if {$index >= 0} {
@ -78,9 +81,9 @@ if {$argc >= 3} {
set CoverageVsimArg "-coverage"
echo $tbArgsLst
set tbArgsLst [lreplace $tbArgsLst $index $index ]
echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!"
echo $tbArgsLst
echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!"
#echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!"
#echo $tbArgsLst
#echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!"
}
# separate the +args from the -G parameters
@ -92,6 +95,18 @@ if {$argc >= 3} {
}
}
}
# helpful debug code remove later
#echo "help me!!!!!!! GUI ="
#echo $GUI
#echo "help me!!!!!!! lst ="
#echo $lst
#echo "help me!!!!!!! = accFlag ="
#echo $accFlag
#echo "help me!!!!!!! PlusArgs ="
#echo $PlusArgs
#echo "help me!!!!!!! ParamArgs ="
#echo $ParamArgs
#echo "help me!!!!!!!"
# compile source files
# suppress spurious warnngs about

5
sim/questa/wave.do
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@ -205,6 +205,7 @@ add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/SrcAE
add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/SrcBE
add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/ALUResultE
add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/dp/ResultW
add wave -noupdate -expand -group {Memory Stage} /testbench/FunctionName/FunctionName/FunctionName
add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/InstrValidM
add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/PCM
add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/InstrM
@ -661,7 +662,7 @@ add wave -noupdate -expand -group testbench /testbench/DCacheFlushStart
add wave -noupdate /testbench/dut/core/lsu/hptw/hptw/HPTWLoadPageFault
add wave -noupdate /testbench/dut/core/lsu/hptw/hptw/HPTWLoadPageFaultDelay
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 4} {6586 ns} 1} {{Cursor 4} {11656 ns} 0} {{Cursor 3} {403021 ns} 1}
WaveRestoreCursors {{Cursor 4} {6586 ns} 1} {{Cursor 4} {2112952 ns} 0} {{Cursor 3} {403021 ns} 1}
quietly wave cursor active 2
configure wave -namecolwidth 250
configure wave -valuecolwidth 194
@ -677,4 +678,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {0 ns} {284634 ns}
WaveRestoreZoom {2039338 ns} {2323972 ns}

1
src/ifu/bpred/bpred.sv
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@ -212,7 +212,6 @@ module bpred import cvw::*; #(parameter cvw_t P) (
// could be wrong or the fall through address selected for branch predict not taken.
// By pipeline the BTB's PC and RAS address through the pipeline we can measure the accuracy of
// both without the above inaccuracies.
// **** use BPBTAWrongM from BTB.
assign RASPredPCWrongE = (RASPCE != IEUAdrE) & ReturnE & PCSrcE;
flopenrc #(P.XLEN) RASTargetDReg(clk, reset, FlushD, ~StallD, RASPCF, RASPCD);

6
src/ifu/bpred/gshare.sv
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@ -47,7 +47,7 @@ module gshare import cvw::*; #(parameter cvw_t P,
logic MatchF, MatchD, MatchE, MatchM, MatchW;
logic MatchX;
logic [1:0] TableBPDirPredF, BPDirPredD, BPDirPredE, FwdNewDirPredF;
logic [1:0] PHTBPDirPredF, BPDirPredD, BPDirPredE, FwdNewDirPredF;
logic [1:0] NewBPDirPredE, NewBPDirPredM, NewBPDirPredW;
logic [k-1:0] IndexNextF, IndexF, IndexD, IndexE, IndexM, IndexW;
@ -83,12 +83,12 @@ module gshare import cvw::*; #(parameter cvw_t P,
MatchM ? {NewBPDirPredM} :
NewBPDirPredW ;
assign BPDirPredF = MatchX ? FwdNewDirPredF : TableBPDirPredF;
assign BPDirPredF = MatchX ? FwdNewDirPredF : PHTBPDirPredF;
ram2p1r1wbe #(.USE_SRAM(P.USE_SRAM), .DEPTH(2**k), .WIDTH(2)) PHT(.clk(clk),
.ce1(~StallF), .ce2(~StallW & ~FlushW),
.ra1(IndexNextF),
.rd1(TableBPDirPredF),
.rd1(PHTBPDirPredF),
.wa2(IndexM),
.wd2(NewBPDirPredM),
.we2(BranchM),

2
testbench/testbench.sv
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@ -601,7 +601,7 @@ module testbench;
loggers (clk, reset, DCacheFlushStart, DCacheFlushDone, memfilename, TEST);
// track the current function or global label
if (DEBUG == 1 | ((PrintHPMCounters | BPRED_LOGGER) & P.ZICNTR_SUPPORTED)) begin : FunctionName
if (DEBUG > 0 | ((PrintHPMCounters | BPRED_LOGGER) & P.ZICNTR_SUPPORTED)) begin : FunctionName
FunctionName #(P) FunctionName(.reset(reset_ext | TestBenchReset),
.clk(clk), .ProgramAddrMapFile(ProgramAddrMapFile), .ProgramLabelMapFile(ProgramLabelMapFile));
end