1426 Commits

Author	SHA1	Message	Date
Ross Thompson	822d989383	Added comment.	2022-09-20 09:49:53 -05:00
Ross Thompson	4c3c517322	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-20 09:47:16 -05:00
David Harris	00c15ec472	renamed q to u for unified digit selection	2022-09-20 04:35:14 -07:00
David Harris	d01588d693	Removed D2 and D2b from radix2 stage	2022-09-20 04:20:38 -07:00
David Harris	2ea7df1b6d	Simplified UM initialization	2022-09-20 04:18:12 -07:00
David Harris	0d5e80a4f0	fdivsqrtfgen4 comments	2022-09-20 04:13:21 -07:00
David Harris	653c458241	Moved fpu modules into subdirectories	2022-09-20 04:12:05 -07:00
David Harris	0ec1886b89	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
David Harris	a05b6486b1	Simplified fdivsqrtpostproc QmM logic	2022-09-20 03:30:18 -07:00
David Harris	87cde2c427	make QmM size b+1 indpenedent of radix	2022-09-20 03:25:09 -07:00
David Harris	e455f41b97	clean up divshiftcalc	2022-09-20 03:19:50 -07:00
David Harris	211705eca2	clean up divshiftcalc	2022-09-20 03:17:29 -07:00
David Harris	d3b2a192eb	clean up divshiftcalc	2022-09-20 03:13:11 -07:00
David Harris	f5083803c2	clean up divshiftcalc	2022-09-20 03:08:25 -07:00
David Harris	2faa0d14be	Cleaning up divshiftcalc LOGNORMSHIFTSZ	2022-09-20 02:35:01 -07:00
Jacob Pease	1e7bbe1a87	Fixed rxfifotimeout restarting for every new character, even when already high.	2022-09-19 18:00:30 -05:00
cturek	019a6eb9f5	Radix 4 sqrt passing first two tests	2022-09-19 21:26:32 +00:00
Ross Thompson	bcca9a62c5	Fixed up IFU ahb interface names and widths.	2022-09-19 10:54:22 -05:00
David Harris	8e90862dad	Removed EarlyTermShift from fdiv	2022-09-19 08:44:23 -07:00
David Harris	73ceb4590c	Finished unified divsqrt otfc and fgen name changes	2022-09-19 08:30:59 -07:00
David Harris	3cf6becaf4	fdivsqrtiter simplification	2022-09-19 01:08:01 -07:00
David Harris	e840edc4e6	Reduced number of cycles needed for division	2022-09-19 01:02:04 -07:00
David Harris	d6f1453275	Cleaned up otfc4	2022-09-19 00:58:20 -07:00
David Harris	309995a6e9	OTFC simplification	2022-09-19 00:51:56 -07:00
David Harris	59b6346a28	Removed unused otfc for Q	2022-09-19 00:43:27 -07:00
David Harris	e764d4322c	fdiv cleanup	2022-09-19 00:32:34 -07:00
David Harris	cf0c20d489	Division working again for radix 2 with unified OTFC	2022-09-19 00:30:30 -07:00
David Harris	b636072914	Unified on-the-fly conversion working for radix 2; broke radix-4 division	2022-09-19 00:04:00 -07:00
David Harris	4dbe1035cb	Added 2 bits to C to initialize properly	2022-09-18 22:44:22 -07:00
David Harris	f202eb0f6f	Added 2 bits to C to initialize properly	2022-09-18 22:42:35 -07:00
David Harris	cff3c2535d	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-18 21:27:36 -07:00
David Harris	498c053aab	FP testbench	2022-09-18 21:27:21 -07:00
David Harris	f38bb5b32e	Divide testfloat starts with half-precision tests	2022-09-18 06:46:47 -07:00
Ross Thompson	57c366c1b2	Removed NonIROM and NonDTIM select signals from IFU and LSU.	2022-09-17 22:01:03 -05:00
Ross Thompson	cb34b7c98f	Found the ahb burst bug. ... We had instruction fetches fixed HSIZE = 2 (4 bytes) for all requests. It should be HSIZE = 3 (8 bytes) for cache fetches and 4 for uncached reads. The reason this worked for non burst is the DDR4 memory controller returns the full double word even for 4 byte reads. In burst mode the second beat ending up pointing to the next 4 bytes rather than the next 8 bytes.	2022-09-17 20:30:01 -05:00
David Harris	b74a68ff0f	Reduced number of cycles required for lower-precision sqrt	2022-09-17 09:55:34 -07:00
David Harris	ac78823f6c	Starting to adust number of cycles for division/sqrt	2022-09-17 05:58:59 -07:00
cturek	79addec27a	Fixed j1 to align with new C reg	2022-09-16 02:15:48 +00:00
Kip Macsai-Goren	cc7d1c8ef9	Created initial endianness tests	2022-09-16 01:06:26 +00:00
David Harris	8f2b3b2387	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-15 12:49:21 -07:00
David Harris	94dca9194e	renamed endianswap	2022-09-15 12:49:18 -07:00
Ross Thompson	38e114a6c0	Fixed subword read to work with bigendian.	2022-09-15 14:08:04 -05:00
David Harris	29d9ded25c	FDIVSQRT cleanup	2022-09-15 09:10:57 -07:00
Ross Thompson	cea012a640	renamed multimanager to multicontroller.	2022-09-14 14:03:37 -05:00
Ross Thompson	bf6468a24c	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-14 13:59:22 -05:00
cturek	da67e02392	Added shift for radix 4 sqrt	2022-09-14 17:34:24 +00:00
cturek	47d02db2eb	Moved X-1 to preproc	2022-09-14 17:26:56 +00:00
cturek	fe77b5e37b	Delete srt	2022-09-14 17:02:42 +00:00
cturek	4f3baea0fc	removed unnecessary XZero from wsmux	2022-09-14 16:59:52 +00:00
David Harris	14bbd07e63	ZMerge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-14 09:42:17 -07:00
Ross Thompson	2c86badeb2	pipelining of fetch into evict AHB requests.	2022-09-13 17:51:55 -05:00
Ross Thompson	c7d3580637	Renamed signals in the LSU.	2022-09-13 11:47:39 -05:00
David Harris	1495305045	Removed unused signals	2022-09-12 11:35:35 -07:00
David Harris	7197a6de44	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-08 16:05:58 -07:00
David Harris	7639c05e51	Moved C to shift before rather than after using in an iteration	2022-09-08 16:05:53 -07:00
David Harris	7ba9b0b349	divsqrt comment cleanup	2022-09-08 15:40:42 -07:00
Ross Thompson	c4a7d3c147	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-08 17:15:46 -05:00
David Harris	5ea82cff33	CSA-based completion detection	2022-09-08 14:58:08 -07:00
Ross Thompson	7f1ae039b0	Optimization. Able to remove hptw address muxes from the E stage.	2022-09-08 15:51:18 -05:00
Ross Thompson	0904951a8c	Oups the ahbinterface.sv was accidentally named abhinterface.sv.	2022-09-08 13:21:37 -05:00
Ross Thompson	6e8d97e921	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-07 16:36:51 -05:00
Ross Thompson	f4e3036593	Oups fixed order of ending swap with mux between cache and fetch buffer.	2022-09-07 16:29:47 -05:00
David Harris	2d5e7827df	Factored out aplusbeq0 unit	2022-09-07 11:36:35 -07:00
David Harris	c730ddf74a	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-07 11:11:39 -07:00
David Harris	7a29f9c95b	Running 16-bit square root cases first in testfloat	2022-09-07 11:11:35 -07:00
Ross Thompson	0615798467	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-09-07 12:26:50 -05:00
David Harris	ce6e153b15	Run 16-bit fsqrt tests first	2022-09-07 10:26:09 -07:00
Ross Thompson	83306ec238	Named change for ahb tests to be less annoying.	2022-09-07 12:24:41 -05:00
David Harris	838d98cf4b	Preprocessing cleanup	2022-09-07 10:21:27 -07:00
Ross Thompson	3571fb18c2	Modified regression tests to add some ahb configurations.	2022-09-07 12:03:58 -05:00
David Harris	dff9416a33	Added rv32i config for regression of wally32periph	2022-09-07 09:37:59 -07:00
Ross Thompson	5a0cda9860	Merge branch 'multimanager' into main	2022-09-07 10:54:27 -05:00
David Harris	c8e0ea067e	Continued simplifying fdivsqrt postprocessing	2022-09-07 07:02:22 -07:00
David Harris	b0ff3a0952	Continued simplifying fdivsqrt postprocessing	2022-09-07 07:00:13 -07:00
David Harris	9e7926e8d7	Moving postprocessing into postproc block	2022-09-07 06:42:37 -07:00
David Harris	c39e71f168	fdivsqrtfsm cleanup	2022-09-07 06:32:07 -07:00
David Harris	027b303b20	fdivsqrtfsm cleanup	2022-09-07 06:27:01 -07:00
David Harris	19e449b83d	Fixed regression for divsqrt radix2	2022-09-07 06:12:23 -07:00
Ross Thompson	7ad7cea25b	James found a bug in synchronizer. Was not actually back to back flip flops.	2022-09-06 15:06:54 -05:00
Ross Thompson	bc15f6c5e4	Added logic to make burst optional.	2022-09-06 09:21:21 -05:00
Ross Thompson	68a200d728	Added generate around the longer latency version of the ram_ahb.sv	2022-09-06 09:21:03 -05:00
Ross Thompson	20643ffc4a	Names changes.	2022-09-05 20:49:35 -05:00
Ross Thompson	2554f96662	Cleaned up hacks to ram.	2022-09-04 14:52:40 -05:00
Ross Thompson	c87268baf1	Modified ram_ahb to work with different latencies.	2022-09-04 14:46:15 -05:00
Ross Thompson	f9daa7f6b9	Progress towards fixing the select HREADY muxing in uncore.	2022-09-04 13:07:49 -05:00
Ross Thompson	221367efb9	Disabled AHB burst mode, which discovered a bug. ... Multimanger bug in how back to back requests were arbitrated.	2022-09-03 22:31:41 -05:00
cturek	254bb8e0a0	Old changes to old files	2022-09-03 22:09:55 +00:00
Ross Thompson	d601fdf186	Possible fix to AHB burst eviction bug. If HREADY went low during a burst seq the next data phase would only last 1 cycle.	2022-09-02 19:58:41 -05:00
Ross Thompson	00cffb0aa5	Renamed state in buscachefsm to match AHB phases.	2022-09-02 17:17:40 -05:00
Ross Thompson	6f2acf678c	Renamed states in busfsm to match AHB phases and book names.	2022-09-02 17:12:36 -05:00
Ross Thompson	6f366c643d	Possible fix for AHB trailing ~HREADY bug.	2022-09-02 16:58:35 -05:00
Ross Thompson	3361a06c62	Merge branch 'multimanager' of github.com:davidharrishmc/riscv-wally into multimanager	2022-09-02 16:31:07 -05:00
Ross Thompson	5d2b299182	Fixed brom1p1r.sv to have fpga preload.	2022-09-02 15:49:50 -05:00
Ross Thompson	c1de88d929	Merge branch 'multimanager' of github.com:davidharrishmc/riscv-wally into multimanager	2022-09-02 13:54:48 -05:00
Ross Thompson	4d60d9a840	Fixed up FPGA constraints. ... Added back in the fpga boot rom preload.	2022-09-02 13:54:35 -05:00
David Harris	41448663b9	Initial radix 4 square root debuggin	2022-09-01 16:57:57 -07:00
Ross Thompson	055b55402f	clean up subword write.	2022-09-01 17:55:19 -05:00
David Harris	5e26bcced1	Fixed lint errors in square root and improved waveforms in testfloat	2022-09-01 15:49:13 -07:00
Ross Thompson	eae56a890c	marked possible improvement to ahb bus fsms.	2022-08-31 23:57:08 -05:00
David Harris	199296dd03	fdiv debug	2022-08-31 14:26:31 -07:00