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503 Commits

Author SHA1 Message Date
David Harris
0e16203cd8 Merge pull request #393 from ross144/main 
Implemented and tested CBOZ instruction
 2023-08-24 19:17:38 -07:00
David Harris
c45fbe1ffe Merge pull request #394 from harshinisrinath1001/main 
Improved testing of csri with priv.S!
 2023-08-24 19:16:50 -07:00
harshinisrinath
c9112ff18d Improved testing of csri with priv.S 2023-08-24 18:39:15 -07:00
Ross Thompson
cd3349bd26 Added rv32 cboz test. 2023-08-24 17:02:53 -05:00
Ross Thompson
914b6f9734 Now have CBOZ instructions working! 2023-08-24 16:47:35 -05:00
Ross Thompson
7d51690b7c Oups forgot to include the 32-bit cbom test in previous commit. 2023-08-24 09:04:41 -05:00
David Harris
d801916d97 Merge pull request #383 from ross144/main 
Adds Zicbom support for D-cache only.  I-cache not yet supported.  Tests 32 and 64 bit versions.  Please rebuild regressions wally32 and wally64.  To save rebuild time edit lines 11-12 of tests/riscof/Makefile
 2023-08-21 13:32:00 -07:00
David Harris
409abbf443 Merge pull request #381 from harshinisrinath1001/main 
Tried to improve coverage of CSRI with priv.S
 2023-08-21 13:28:39 -07:00
Ross Thompson
310b700550 Have a working 32 bit cbom test! 2023-08-21 13:46:09 -05:00
Ross Thompson
d4c6ba627d Working CBO tests for 64 bit! 2023-08-21 12:55:07 -05:00
Ross Thompson
5ed096e4bc Made a bunch of progress towards getting cbo instructions tested. 2023-08-21 11:46:21 -05:00
harshinisrinath
3d3d15077b cleared stimer interrupt 2023-08-20 15:42:27 -07:00
harshinisrinath
fdb7abec06 tried to improve testing of csri in privileged module 2023-08-20 15:40:02 -07:00
David Harris
2738423441 Improved CSRU coverage with priv.S 2023-08-20 12:49:31 -07:00
harshinisrinath
7494ce06eb wrote testcase to write into FSCR 2023-08-20 12:10:08 -07:00
Ross Thompson
05d590b0b9 Fixed issue when with flush miss. 2023-08-18 16:36:13 -05:00
Ross Thompson
fc3fccafe9 Now we have invalidate, clean, and flush working. 2023-08-18 16:32:22 -05:00
Ross Thompson
4eeba9bed9 Added cbom test to custom. Needs to be moved to wally-riscv-arch-tests. 2023-08-18 15:59:39 -05:00
harshinisrinath
b4cfdf3393 Fixed bug and tried to reset menvcfg to improve testing of csri in priv. 2023-07-30 16:40:06 -07:00
harshinisrinath
413a104b6c Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-07-23 11:59:43 -07:00
Ross Thompson
a89a1e675c Merge branch 'boot' into mergeBoot 
Merges Jacob's new sdc controller into wally.
 2023-07-21 17:43:45 -05:00
Jacob Pease
380d96b359 Working new boot process. Buildroot package for sdc. 2023-07-20 14:15:59 -05:00
Jacob Pease
b3aaa87cba Modified bootloader to access GUID partitions. SDC interrupt to PLIC. 
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.

The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself  was modified to accept the
SDC interrupt signal.
 2023-07-14 13:36:44 -05:00
harshinisrinath
8adfcebb4f Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-07-13 13:00:58 -07:00
Kevin Kim
f6a3474550 fixed bug in testvector extract script 
-old script skips first 2 lines in rv32m case, new script only skips first line
- prior code skipped every other line in the reference file, so it only generated half the test vectors, with half of them having the wrong answer
- prior code also opened test vector file to be written to in "append" mode, and I changed to write mode (so that the script overwrites instead of adding to an existing file)
 2023-06-22 09:13:22 -07:00
harshinisrinath
f9d3944cc5 Improved testing of pmd in priv. 2023-06-16 17:13:54 -07:00
harshinisrinath
d018357914 Improve test coverage on ieu fw. 2023-06-16 16:09:48 -07:00
David Harris
c137a1c8cf Fixed timer interrupt testing 2023-06-09 17:20:41 -07:00
David Harris
f68b9c224a Fixed WALLY-trap test case to use menvcfg 2023-06-09 15:24:26 -07:00
David Harris
b70b0c7c5e Added support for menvcfg and senvcfg, including menvcfg.STCE for supervisor timer compare 2023-06-09 14:40:01 -07:00
Ross Thompson
4ddbbd6948 Merge pull request #314 from davidharrishmc/dev 
Make and FP script improvements
 2023-06-06 12:38:26 -04:00
James Stine
ac3253203d Update fcvt tests for l.s/lu.s and s.l/s.lu that were missing 2023-06-05 11:03:59 -05:00
David Harris
1831dfccc2 Fixed paths in creating division test vectors 2023-05-31 06:30:41 -07:00
David Harris
b5f70013b1 Clean up combined int/fp vector creation 2023-05-30 14:01:12 -07:00
Jacob Pease
40f81d5da6 The Vivado-RISC-V SDC works. Wally is now booting through it. 2023-05-26 15:42:33 -05:00
David Harris
b4c9998b26 Increased timeout for riscof because it is so slow 2023-05-23 15:37:09 -07:00
David Harris
19096a812a Added Zifencei ISA to tests where necessary to support new compiler 2023-05-16 11:18:27 -07:00
David Harris
0a7a159d69 Added Zicsr and zifencei to RVTEST_ISA in custom tests where necessary to make them compile 2023-05-14 06:58:29 -07:00
David Harris
0cc8f9fd15 Fixed riscof scripts that were removing zicsr from compiler misa 2023-05-14 04:19:08 -07:00
David Harris
67a089104c Defined empty RVMODEL interrupt macros to make riscof warnings go away 2023-05-14 03:36:28 -07:00
Kevin Thomas
0c9b7dcce7 Comment tlbGBL more discriptively 
Reduce redundant instructions
 2023-05-04 19:13:47 -05:00
David Harris
ec3518673e Merge branch 'main' into main 2023-04-28 07:51:32 -07:00
Liam Chalk
028d19bbfa Merge branch 'main' into main 2023-04-27 21:49:01 -07:00
Kevin Wan
39c9cd5ee9 added tests for pmppriority module 2023-04-27 16:12:43 -07:00
David Harris
15fb5fa2ac Update tlbASID.S 
fixed comment about restoring ASID to 0
 2023-04-27 14:32:57 -07:00
Noah Limpert
4ec31de316 complete camline coverage on IFU and LSU 2023-04-27 14:26:10 -07:00
Liam
4d8eafd27d Pmpadrdecs test cases changing AdrMode to 2 or 3 
Setting AdrMode to 2 or 3 for pmpadrdecs[0-4] writing values to pmpcfg0 to change AdrMode to 2 or 3
Also exclusion for pmpadrdecs[0] coverage case for PAgePMPAdrIn being hardwired to 1 in pmpadrdec.sv
 2023-04-27 12:23:35 -07:00
Alexa Wright
09095422d0 Merge branch 'openhwgroup:main' into main 2023-04-26 16:26:30 -07:00
Alexa Wright
59d913949f Excluded and added coverage for WFI test case. 2023-04-25 17:06:57 -07:00
Liam
7bf2ee5418 pmpaddr0 and pmpaddr2 test cases 
Writing 0x00170000 and 0x17000000 to pmpaddr0 and pmpaddr2.
Increased IFU coverage from 83.53% to 83.68% and LSU coverage from 93.29% to 93.45%.
 2023-04-25 15:37:04 -07:00