Merge pull request #381 from harshinisrinath1001/main

Tried to improve coverage of CSRI with priv.S
This commit is contained in:
David Harris 2023-08-21 13:28:39 -07:00 committed by GitHub
commit 409abbf443
2 changed files with 17 additions and 2 deletions

View File

@ -64,8 +64,11 @@ trap_handler:
interrupt: # must be a timer interrupt
li t0, -1 # set mtimecmp to biggest number so it doesnt interrupt again
li t1, 0x02004000 # MTIMECMP in CLINT
sd t0, 0(t1)
li t1, 0x02004000 # MTIMECMP in CLIN
sd t0, 0(t1)
csrw stimecmp, t0 # sets stimecmp to big number so it doesnt interrupt
li t0, 32
csrc sip, t0 # clears stimer interrupt
j trap_return # clean up and return
exception:

View File

@ -59,11 +59,23 @@ sretdone:
# 1st is when MENVCFG_STCE is cleared
li a0, 3
ecall # starts in M-mode
li t1, -3
csrw stimecmp, t1 # sets stimecmp to large value to prevent it from interrupting immediately
li t0, 2
csrs mstatus, t0 # enables sie
li t0, 32
csrs sie, t0 # enables sie.stie
csrw menvcfg, x0
li a0, 1
ecall # enter S-mode
csrw stimecmp, zero
li a0, 3
ecall # in M-mode
li t0, 32
csrs sip, t0
li a0, 1
ecall # in S-mode and expects stimer interrupt to occur
li a0, 3
ecall # return to M-mode
csrsi mcounteren, 2 # mcounteren_tm = 1
li a0, 1