Commit Graph

507 Commits

Author SHA1 Message Date
David Harris
4a4bbdfc43 More code cleanup 2024-06-14 09:50:07 -07:00
David Harris
53477b2c85 Code cleanup 2024-06-14 07:08:17 -07:00
David Harris
b1c9450b4a Code cleanup: RAM, fdivsqrt 2024-06-14 03:35:05 -07:00
David Harris
312c9c9f55 Updated logger to new IClass signal name 2024-06-12 07:24:05 -07:00
Rose Thompson
48fd365b9d Still don't understand why wally.do can't load testbench.sv with functional coverage. But wally-imperas-cov.do can load testbench.sv with functional coverage. 2024-05-28 13:00:17 -05:00
Rose Thompson
92ee56c1a1 Yay. Finally found the bug which prevented wally.do from having functional coverage using riscvISACOV.
testbench.sv was missing the trace2cov instance.
2024-05-27 17:25:20 -05:00
Jordan Carlin
dcafe4793e
Add froundnx and fround.d tests 2024-05-24 15:16:35 -07:00
Rose Thompson
6e3ccbb9c1 Almost have it working for both buildroot and single elfs. 2024-05-17 17:34:29 -05:00
Rose Thompson
224b2e4dc4 Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-17 17:10:28 -05:00
Rose Thompson
0ed75a3ff5 Reverted testbench-imperas.sv incase someone wants this. 2024-05-17 16:48:29 -05:00
Rose Thompson
038aae388b Yay. Finally found the issue with the integrated testbench.sv and imperasDV.
The function which loads the elf file rvviRefInit must be called during an initial block
using a valid file name.  Because of how the testbench was organized the elffile was not defined
until several cycles later so the call to rvviRefInit did not have a valid elf.  Waiting several
cycles does not work.  rvviRefInit requires being called in an initial block so it is not possible
to run back to back imperasDV simulations in the same run.
2024-05-17 16:45:01 -05:00
Rose Thompson
e6902eb4d2 Ok. How does it still work? testbench-imperas.sv the same as testbench.sv now. 2024-05-17 16:08:14 -05:00
Rose Thompson
d9807bb909 This is crazy. I'm merging testbench.sv into testbench-imperas.sv to find the point when it stops working. But each logical point where it would stop working it keeps working. For example moving readmemh from initial to always block. 2024-05-17 14:45:37 -05:00
Rose Thompson
a885240fbd temporary commit to help debug merging testbench.sv with testbench-imperas.sv 2024-05-17 12:36:00 -05:00
Rose Thompson
62eaca0e6e Almost working ImperasDV with testbench.sv and wally.do. For some reason IDV is saying the instructions are mismatching. 2024-05-16 17:01:25 -05:00
Rose Thompson
9a42aab971
Merge pull request #804 from jordancarlin/dev
Eliminate more logical operators and replace with bitwise operators
2024-05-16 15:45:18 -05:00
Rose Thompson
8391b8b821 Progress towards unified regression. 2024-05-16 15:29:12 -05:00
Rose Thompson
08601d7270 Added functionallity to testbench.sv for single elf files. 2024-05-16 13:59:15 -05:00
Jordan Carlin
1d8ffee20c
Certain Zcb instructions are dependent on other extensions, not the entire extension 2024-05-15 19:16:43 -07:00
Jordan Carlin
ef778da98d
Eliminate more logical operators and replace with bitwise 2024-05-15 10:50:23 -07:00
Jordan Carlin
4ffce9a752
Switch riscvassertions to use bitwise operators instead of logical operators per Wally style guide 2024-05-15 09:23:24 -07:00
Rose Thompson
e295454948
Merge pull request #798 from jordancarlin/newConfig
Update config to derive MISA from macros and update MISA bits based on the spec
2024-05-15 10:28:44 -05:00
Jordan Carlin
291d1e62d5
M implies Zmmul 2024-05-14 19:38:34 -07:00
Jordan Carlin
4a72922087
update config to derive MISA from macros
- Remove C_SUPPORTED and update decompress unit based on Zc* extensions
- Derive A_SUPPORTED from A subextensions
- Derive B_SUPPORTED from B subextensions
- Derive C_SUPPORTED from C subextensions
2024-05-14 06:49:18 -07:00
David Harris
175c18da01 Parameterized FMA. However, some offsets are not parameterized. See PR #793 for list of changes 2024-05-13 15:16:00 -07:00
David Harris
d4ac53f000 commented legal TEST options 2024-05-13 07:22:30 -07:00
David Harris
75c10bddfa Moved case.sh to tests/fp 2024-05-13 07:12:16 -07:00
David Harris
d0dad1d9f6 Fixed testbench_fp to use modified unpacker 2024-05-12 12:11:48 -07:00
David Harris
380d88fc68 Merged config-shared after fma fix 2024-05-12 11:10:55 -07:00
David Harris
009d251433 Fixed cvtint bug by adding 2 bits to convert width; initial implementation of fround passes basic regression but fails some nightly regression cases 2024-05-11 22:32:51 -07:00
David Harris
c0743a1fcf Added missing convert F to/from Int64 tests for arch64f 2024-05-11 02:29:47 -07:00
Katherine Parry
807ef44772 fixed fma testfloat issue #578 2024-05-10 18:12:11 -07:00
Rose Thompson
ceb31fec68 Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-10 08:54:23 -05:00
Rose Thompson
b027fa44ef Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-10 08:53:00 -05:00
Rose Thompson
4bd5d334df Modified testbench so it instantiates the function logger if DEBUG is greater than 0 rather than just 1. 2024-05-10 08:51:59 -05:00
David Harris
66b33c09be Added Zaamo and Zalrsc support to testbench and regression 2024-05-10 05:41:00 -07:00
David Harris
54750ae4d5 Fixed out-of-bound vector accesses in testbench_fp when FLEN < Q_LEN 2024-05-09 19:52:37 -07:00
David Harris
bdd0043cd1 Testbench terminates buildroot sim at instruction limit 2024-05-09 07:58:53 -07:00
David Harris
47af54b131 Fixed buildroot prematurely terminating in VCS 2024-05-09 07:29:45 -07:00
David Harris
0d1d59a3d8 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-05-08 18:58:01 -07:00
Divya2030
31ae18922b regression_wally vcs run works 2024-05-08 04:25:03 -07:00
David Harris
77137f0f60 ZAAMO and ZALRSC implemented but not tested 2024-05-07 16:45:49 -07:00
Divya2030
a3f1a274d2 VCS Simulation Passed 2024-05-07 10:41:02 -07:00
David Harris
06d3591a15 Divy's change for VCS signature checking 2024-05-04 02:45:43 -07:00
Divya2030
12a9c0ebd6 pmp coverage 2024-05-02 11:53:32 -07:00
Divya2030
ee566aa856 pmp coverage 2024-05-02 11:53:04 -07:00
Divya2030
7a5eac963e Revert "pmp functional coverage basic"
This reverts commit db2b07b05d.
2024-05-02 11:43:33 -07:00
Divya2030
3853f94337 Revert "initial commit pmp basic coverage working"
This reverts commit 7ca1c976c0.
2024-05-02 11:23:59 -07:00
Divya2030
9f27f3fe28 Merge branch 'main' of github.com:Divya2030/cvw 2024-05-02 11:21:05 -07:00
Divya2030
db2b07b05d pmp functional coverage basic 2024-05-02 11:20:03 -07:00