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https://github.com/openhwgroup/cvw
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Added functionallity to testbench.sv for single elf files.
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@ -68,7 +68,7 @@ module testbench;
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logic ResetMem;
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// Variables that can be overwritten with $value$plusargs at start of simulation
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string TEST;
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string TEST, ElfFile;
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integer INSTR_LIMIT;
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// DUT signals
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@ -115,6 +115,10 @@ module testbench;
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// look for arguments passed to simulation, or use defaults
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if (!$value$plusargs("TEST=%s", TEST))
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TEST = "none";
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if (!$value$plusargs("ElfFile=%s", ElfFile))
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ElfFile = "none";
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else begin
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end
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if (!$value$plusargs("INSTR_LIMIT=%d", INSTR_LIMIT))
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INSTR_LIMIT = 0;
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@ -221,8 +225,12 @@ module testbench;
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"arch32zknh": if (P.ZKNH_SUPPORTED) tests = arch32zknh;
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endcase
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end
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if (tests.size() == 0) begin
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$display("TEST %s not supported in this configuration", TEST);
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if (tests.size() == 0 & ElfFile == "none") begin
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if (tests.size() == 0) begin
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$display("TEST %s not supported in this configuration", TEST);
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end else if(ElfFile == "none") begin
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$display("ElfFile %s not found", ElfFile);
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end
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$finish;
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end
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`ifdef MAKEVCD
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@ -356,21 +364,23 @@ module testbench;
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//end // added
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//always @(posedge SelectTest) // added
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if(SelectTest) begin
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if (riscofTest) memfilename = {pathname, tests[test], "/ref/ref.elf.memfile"};
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else if(TEST == "buildroot") begin
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if (riscofTest) begin
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memfilename = {pathname, tests[test], "/ref/ref.elf.memfile"};
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ProgramAddrMapFile = {pathname, tests[test], "/ref/ref.elf.objdump.addr"};
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ProgramLabelMapFile = {pathname, tests[test], "/ref/ref.elf.objdump.lab"};
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end else if(TEST == "buildroot") begin
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memfilename = {RISCV_DIR, "/linux-testvectors/ram.bin"};
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bootmemfilename = {RISCV_DIR, "/linux-testvectors/bootmem.bin"};
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uartoutfilename = {"logs/", TEST, "_uart.out"};
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uartoutfile = $fopen(uartoutfilename, "w"); // delete UART output file
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end
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else memfilename = {pathname, tests[test], ".elf.memfile"};
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if (riscofTest) begin
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ProgramAddrMapFile = {pathname, tests[test], "/ref/ref.elf.objdump.addr"};
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ProgramLabelMapFile = {pathname, tests[test], "/ref/ref.elf.objdump.lab"};
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end else if (TEST == "buildroot") begin
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ProgramAddrMapFile = {RISCV_DIR, "/buildroot/output/images/disassembly/vmlinux.objdump.addr"};
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ProgramLabelMapFile = {RISCV_DIR, "/buildroot/output/images/disassembly/vmlinux.objdump.lab"};
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end else if(ElfFile != "none") begin
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memfilename = {ElfFile, ".memfile"};
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ProgramAddrMapFile = {ElfFile, ".objdump.addr"};
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ProgramLabelMapFile = {ElfFile, ".objdump.lab"};
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end else begin
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memfilename = {pathname, tests[test], ".elf.memfile"};
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ProgramAddrMapFile = {pathname, tests[test], ".elf.objdump.addr"};
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ProgramLabelMapFile = {pathname, tests[test], ".elf.objdump.lab"};
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end
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@ -410,6 +420,15 @@ module testbench;
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$display("Embench Benchmark: created output file: %s", outputfile);
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end else if (TEST == "coverage64gc") begin
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$display("Coverage tests don't get checked");
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end else if (ElfFile != "none") begin
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$display("Single Elf file tests don't get signatured checked.");
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`ifdef VERILATOR // this macro is defined when verilator is used
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$finish; // Simulator Verilator needs $finish to terminate simulation.
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`elsif SIM_VCS // this macro is defined when vcs is used
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$finish; // Simulator VCS needs $finish to terminate simulation.
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`else
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$stop; // if this is changed to $finish for Questa, wally-batch.do does not go to the next step to run coverage, and wally.do terminates without allowing GUI debug
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`endif
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end else begin
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// for tests with no self checking mechanism, read .signature.output file and compare to check for errors
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// clear signature to prevent contamination from previous tests
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