Commit Graph

7632 Commits

Author SHA1 Message Date
David Harris
5dbca251d8 Defined new Zicboz and Zcb tests 2023-12-19 13:24:11 -08:00
David Harris
4186b604e0 Updated imperas.ic to throw misalignment faults on uncachable memory regions 2023-12-19 12:53:21 -08:00
David Harris
b0f34a6377 Made priority of misalignment depend on ZICCLSM_SUPPORTED and made StoreAmo take prioirty over load faults 2023-12-19 12:51:45 -08:00
David Harris
6ba3ae662f Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-12-17 19:04:50 -08:00
Rose Thompson
42d115bc27
Merge pull request #536 from stineje/main
Fix issue with running all and then going from one operand width to a…
2023-12-17 18:59:47 -08:00
James E. Stine
f4c1713ed4 Fix issue with running all and then going from one operand width to another. Issue is due to signals resolving between sizes. I did not catch it before because I did not run through the complete exhaustive tests. This time, went through all tests and tested all the data sizes. 2023-12-17 20:55:06 -06:00
David Harris
0eed57a0b7
Merge pull request #535 from stineje/main
fix bad typo on spef integration for tsmc28psyn
2023-12-15 21:13:38 -08:00
James E. Stine
54b0285300 fix bad typo on spef integration for tsmc28psyn 2023-12-15 23:06:05 -06:00
David Harris
6cb4a9e905 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-12-15 19:27:10 -08:00
David Harris
a138ef37b1 Switched to using riscv-arch-test rv32e_m suite. Need to rename it from rv32e_unratified (PR pending) 2023-12-15 19:26:50 -08:00
David Harris
d6830a1faa
Merge pull request #534 from stineje/main
Fix some minor issues but main push is for Issue #507 resolution
2023-12-15 19:23:27 -08:00
David Harris
bbdcfe24ca
Merge pull request #533 from ross144/main
Finally fixed the store delay hazard bug.
2023-12-15 19:13:53 -08:00
James E. Stine
27a7994847 Modify DC to export spef for DC extraction of parasitics. This file can be used to read in an ancillary tool (e.g., snps PrimeTime) to get more detail on power estimation 2023-12-15 17:21:24 -06:00
James E. Stine
01a246422f Update bug in wally-tool-chain-install.sh script due to misspelling for an environmental variable. In addition, zlibc was removed due to deprecation 2023-12-15 17:04:37 -06:00
James E. Stine
8d8bad61d4 Fix to take care of Issue #507. Issue was caused with time delay in testbench-fp.sv that interfered with the if statement in the DIVSQRT condition for generating a vector. This original time delay was given to guarantee that the previous operation would complete. However, the testbench was modified to make sure this would not happen and this time delay is not needed obviating any issue that caused Issue #507. Some other small enhancements were made to the testbench-fp.sv for beautification, as well. A full test was run on the testbench to check its validity. 2023-12-15 17:02:11 -06:00
Rose Thompson
7693c5d4e2 Updates to fpga top level. 2023-12-15 15:32:05 -06:00
Rose Thompson
26cd22c388 Replaced fpga's verilog top with system verilog. 2023-12-15 13:42:52 -06:00
Rose Thompson
dab9d7ab3c Replaced fpga top level verilog with system verilog. 2023-12-15 13:07:08 -06:00
Rose Thompson
57f163f103 Merge branch 'main' of github.com:ross144/cvw 2023-12-15 11:59:17 -06:00
Rose Thompson
438451ee02 Fixed the AMO hazard. 2023-12-15 11:55:54 -06:00
David Harris
38f4d9baf8 Use riscv-arch-test arch32e instead of outdated wally-riscv-arch-test wally32e 2023-12-15 05:05:53 -08:00
David Harris
51b43bffa3 ALU cleanup 2023-12-14 19:06:39 -08:00
Rose Thompson
872b830801
Merge pull request #532 from davidharrishmc/dev
Lint fix and WALLY-lrsc fix to pass ImperasDV
2023-12-14 15:51:58 -08:00
David Harris
29f57958a9 Fixed WALLY-lrsc in ImperasDV by setting reservation set size to native word size and adjusting imperas.ic lr_sc_grain=8 to match 2023-12-14 15:32:36 -08:00
Rose Thompson
34631c54d3 Get's the fpga building again after the git history rewrite. 2023-12-14 17:08:25 -06:00
David Harris
6fbc2c4ded Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-12-14 15:03:00 -08:00
David Harris
8eea2bdcc0
Merge pull request #531 from ross144/main
Updated wavefile
2023-12-14 14:52:31 -08:00
Rose Thompson
1ca9a8be6d I think I solved the AMO/store hazard issue introduced by removing the store delay hazard. 2023-12-14 16:31:02 -06:00
Rose Thompson
bb712d6860 Updated wavefile. 2023-12-14 14:36:23 -06:00
Rose Thompson
53bf68a585
Merge pull request #528 from davidharrishmc/dev
Svnapot bug fix
2023-12-13 21:30:47 -08:00
David Harris
83b3c3b346 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-12-13 20:59:59 -08:00
David Harris
aa83a13b34
Merge pull request #527 from ross144/main
Removed majority of Store Delay Stalls. Still working on cleaning up code, but we should consider reruning benchmarks.
2023-12-13 20:59:53 -08:00
David Harris
c34175ae6c Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-12-13 20:58:40 -08:00
David Harris
68d49c37db Changed PMA settings in imperas.ic so that peripherals require aligned accesses. This fixes WALLY-trap in ImperasDV. 2023-12-13 20:49:26 -08:00
David Harris
166c98b6f6 Fixed issue 526 about WALLY-mmu-sv39-svadu-svnapot-svpbmt not checking ppn for NAPOT pages. Improved test case to check normal and malformed ppn 2023-12-13 19:43:17 -08:00
Rose Thompson
a7f0aaa722 Added comments to finish store delay stall removal. 2023-12-13 20:35:13 -06:00
Rose Thompson
9cf6b1fdeb Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-12-13 20:34:35 -06:00
Rose Thompson
9f4c32d49c Merge branch 'main' of github.com:ross144/cvw 2023-12-13 20:32:59 -06:00
Rose Thompson
b69a5b59cd DTIM works without the store delay stall. Still a bit of work remaining. The DTIM needs cleanup.
The cache needs a bit of clean up and the chapter needs updates.
The controller needs to be updated to remove the store delay hazard for cmo instructions.
2023-12-13 20:32:14 -06:00
Rose Thompson
e089b421bb Got it working for the cache. 2023-12-13 20:24:46 -06:00
David Harris
68d96a929c Fixed hierarchical path to EcallFaultM in testbench 2023-12-13 16:37:54 -08:00
Rose Thompson
f592baa741 Closer. 2023-12-13 18:15:32 -06:00
Rose Thompson
eeced05f33 More progress towards store delay reduction. 2023-12-13 15:56:29 -06:00
Rose Thompson
f3d43a7713 Progress on reducing store stall in d cache. 2023-12-13 15:34:21 -06:00
Rose Thompson
460a06be5b
Merge pull request #525 from davidharrishmc/dev
Rolled back Verilator changes
2023-12-13 12:54:49 -08:00
David Harris
ff26baf7e8 Rolled back attempt to support Verilator 2023-12-13 12:53:44 -08:00
Rose Thompson
9b7c47caa4
Merge pull request #524 from davidharrishmc/main
Renamed HADE to ADUE for Svadu
2023-12-13 11:53:38 -08:00
David Harris
333e390f8d Test commit from dev 2023-12-13 11:52:21 -08:00
David Harris
6c017141c5 Renamed HADE to ADUE for Svadu 2023-12-13 11:49:04 -08:00
Rose Thompson
f78304eaff
Merge pull request #523 from davidharrishmc/main
Fixed Linux makefile; load branch predictor RAMs at startup for sim; …
2023-12-13 11:36:09 -08:00