KelvinTr
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01c45ab9d7
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Fixed K extension changes
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2024-02-28 17:05:08 -06:00 |
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James E. Stine
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0d4d996655
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add spike riscof items for K extension test
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2024-02-24 22:43:33 -06:00 |
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David Harris
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824bc0dab7
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Fixed expected value on WALLY-satp-invalid
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2024-02-16 11:12:57 -08:00 |
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Rose Thompson
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6110799a1e
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Updated the wally rv32 priv tests to not use sail.
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2024-02-16 11:39:06 -06:00 |
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David Harris
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b362320dd9
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Removed unused Makefiles and Makefrags from wally-riscv-arch-test now that it is only used by riscof
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2024-02-16 06:46:49 -08:00 |
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David Harris
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d094201362
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Added NO_SAIL to wally-riscv-arch-test cases that stopped passing in Sail
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2024-02-16 06:27:49 -08:00 |
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David Harris
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9ba35991e3
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Finished FPU coverage
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2024-02-15 20:01:28 -08:00 |
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harshinisrinath
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86c35bad9f
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Wrote illegal instructions for remaining floating point instructions
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2024-02-07 17:13:49 -08:00 |
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harshinisrinath
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96c8526754
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Wrote illegal instructions for remaining floating point instructions
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2024-02-07 17:08:19 -08:00 |
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David Harris
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e7364290e3
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Restored instead of in testbench because prevents coverage analysis. Improved FPU coverage
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2024-02-07 06:27:53 -08:00 |
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David Harris
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dfee790ad7
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Fixed derivative generation when derivs don't already exist. Fixed lint to print success when no failures. Added Zfh fma tests. Some fp tests not running yet.
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2024-02-06 12:35:56 -08:00 |
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David Harris
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5d8d82414b
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Coverage improvements
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2024-02-04 11:40:38 -08:00 |
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Jordan Carlin
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2dce774d34
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tlb ramline coverage improvements
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2024-02-03 09:50:15 -08:00 |
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Jordan Carlin
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0312476fb3
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Update tlb camline ASID coverage to use single file
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2024-02-03 09:48:57 -08:00 |
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Jordan Carlin
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8633f263a2
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Complete coverage of tlb camlines in IFU
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2024-02-01 20:41:05 -08:00 |
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Rose Thompson
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87d91c5b14
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Coverage updates.
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2024-02-01 12:12:01 -06:00 |
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Rose Thompson
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ccf61853cf
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New coverage for ebu.
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2024-01-31 14:55:25 -06:00 |
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Rose Thompson
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07d1a4104a
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Improvement to ebu coverage.
Also modified object dumps to include data segments.
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2024-01-31 14:03:27 -06:00 |
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David Harris
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d9003da8e0
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Moved some tests to wally-riscv-arch-test list that are simulated
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2024-01-30 10:28:51 -08:00 |
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David Harris
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45e2317636
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Added Wally github address to header comments
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2024-01-29 05:38:11 -08:00 |
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David Harris
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3620a10c0b
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Improved hptw and I CacheWays coverage
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2024-01-26 14:55:51 -08:00 |
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David Harris
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1c1d3eb956
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HPTW coverage improvements
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2024-01-26 10:46:38 -08:00 |
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David Harris
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2449e06e55
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Fixed FPU coverage, solved Issue 596 by misaligned AMO throwing access fault when misaligned non-amo are supported
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2024-01-25 21:03:41 -08:00 |
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David Harris
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0e1c53f9f6
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Fixed tlbmisc testing with PBMTE = 0
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2024-01-24 12:24:33 -08:00 |
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David Harris
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66a1edb261
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More coverage touchup
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2024-01-23 23:11:49 -08:00 |
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David Harris
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7215f48dda
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coverage improvements: fixing problems running ImperasDV on coverage tests
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2024-01-23 22:21:01 -08:00 |
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David Harris
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d5f497eec5
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-01-22 09:56:50 -08:00 |
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Jordan Carlin
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0c13e14bbf
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coverage improvements for mret when mpp = 3; update imperas config
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2024-01-22 09:52:58 -08:00 |
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David Harris
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4ffa5e7b0a
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Coverage improvements
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2024-01-22 09:49:24 -08:00 |
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Jordan Carlin
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4936496bb9
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fix sfence.inval.ir and sret coverage from previous PR
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2024-01-22 08:58:31 -08:00 |
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David Harris
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171430a695
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FPU and PMP tests
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2024-01-21 14:41:22 -08:00 |
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David Harris
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ff055c404c
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fpu coverage improvements
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2024-01-21 13:17:56 -08:00 |
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David Harris
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69218b4b86
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Coverage improvements
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2024-01-21 10:03:07 -08:00 |
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David Harris
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9260d3c424
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Add Zfh support to imperas.ic, use Zicond in riscof now that it is fixed in riscv-arch-test
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2024-01-18 22:46:07 -08:00 |
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David Harris
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13de147c7e
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-01-18 22:12:07 -08:00 |
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David Harris
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17c9be7695
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Cleanup typos, remove Zicond from riscof until it is working
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2024-01-18 21:36:52 -08:00 |
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Jordan Carlin
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82d9467eea
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Add coverage of FIOM in different privelege modes
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2024-01-18 19:29:16 -08:00 |
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Jordan Carlin
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12b2baff82
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add coverage of sfence.inval.ir instruction and fix sret coverage
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2024-01-18 17:33:59 -08:00 |
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naichewa
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8b60992e72
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fixed SPI tests failing when no icache
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2024-01-17 14:38:11 -08:00 |
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David Harris
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f8c88a398a
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Coverage improvements
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2024-01-15 07:16:41 -08:00 |
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Jordan Carlin
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51f670c821
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Merge branch 'openhwgroup:main' into main
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2024-01-12 19:43:01 -08:00 |
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Jordan Carlin
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6c797570fa
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Add coverage for all Zcb instructions
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2024-01-12 19:10:13 -08:00 |
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Rose Thompson
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0b2af0c99a
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Modifed the sv39 tests so they work with just 128MiB physical memory.
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2024-01-12 20:00:21 -06:00 |
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Rose Thompson
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e6a2595936
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Modified sv48 svadu test to work with 128MB rather than 2GB physical memory.
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2024-01-12 11:05:06 -06:00 |
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David Harris
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9eb6d9c8b8
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Added Zicond support
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2024-01-11 07:37:15 -08:00 |
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David Harris
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ba7e017bd9
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Added Zcb c.lbu coverage test
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2024-01-10 10:01:46 -08:00 |
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David Harris
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d36b6e919a
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Fixed missing Zba ISA string from spike_rv64gc_isa.yaml for RISCOF
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2024-01-09 10:00:06 -08:00 |
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David Harris
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caedab679a
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Rewrote testbench to count signature entries rather than looking for x; this will facilitate Verilator which does not use x
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2024-01-07 07:14:12 -08:00 |
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David Harris
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0781cd4a44
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Improved tlbcontrol to fault on R=0,W=1; fixed more coverage testsin tlbmisc.S; changed integer type to try to speed up CoreMark; comments in Verilate
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2024-01-05 22:45:15 -08:00 |
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David Harris
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ed623f1a71
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Fixed unsupported riscof YAML string; preparing for Verilator -G testcase
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2024-01-05 20:06:21 -08:00 |
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