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167 Commits

Author SHA1 Message Date
Jarred Allen
6ce4d44ae1 Merge from branch 'main' 2021-04-08 17:19:34 -04:00
bbracker
37bca569ff Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-04-08 14:28:25 -04:00
bbracker
c8c87bd0d8 merge testbench 2021-04-08 14:28:01 -04:00
David Harris
2203e64b65 merge conflict resolution 2021-04-08 13:53:56 -04:00
David Harris
aabebdb59f fixed sim-wally-32ic 2021-04-08 13:40:16 -04:00
bbracker
ce7b2314ef Yee hoo first draft of PLIC plus self-checking tests 2021-04-04 06:40:53 -04:00
Ross Thompson
a743acd1fd Partial fix to the integer divide stall issue. 2021-04-02 15:32:15 -05:00
James E. Stine
9026357350 Added some updates to divider - still not working all the time. Still a bug with signals within muldiv - specificaly MultDivE being modified during Execute stage. Seems to be triggered by ahblite signal. 2021-04-02 06:27:37 -05:00
James E. Stine
59dee5580c Fixed some divide -still bug in AHB causing InstStall to deassert and next instruction to get into divide unit. Hope to fix soon. Divide seems to work if given enough time. 2021-04-01 12:30:37 -05:00
Noah Boorstin
ddc56d8cd7 busybear: clean up questa warnings 2021-03-31 14:02:15 -04:00
ushakya22
ba01d57767 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-30 15:25:07 -04:00
Jarred Allen
6cda818f09 Merge branch 'cache2' into cache 
Conflicts:
	wally-pipelined/testbench/testbench-imperas.sv
 2021-03-30 13:32:33 -04:00
Jarred Allen
85164c7a87 Merge branch 'main' into cache 
Conflicts:
	wally-pipelined/regression/wave-dos/ahb-waves.do
	wally-pipelined/src/ifu/ifu.sv
	wally-pipelined/testbench/testbench-busybear.sv
	wally-pipelined/testbench/testbench-imperas.sv
 2021-03-30 12:55:01 -04:00
Noah Boorstin
606295db2f Merge branch 'main' into cache 
Conflicts:
	wally-pipelined/testbench/testbench-busybear.sv
 2021-03-26 12:26:30 -04:00
Shreya Sanghai
edaf89e3d1 Merge branch 'PPA' into main 
Conflicts:
	wally-pipelined/testbench/testbench-privileged.sv
 2021-03-25 20:35:21 -04:00
Jarred Allen
c8a88757ab Fix error when reading an instruction that crosses a line boundary 2021-03-25 18:47:23 -04:00
ShreyaSanghai
da4086db79 Removed PCW and InstrW from ifu 2021-03-26 01:53:19 +05:30
Noah Boorstin
ee3a53de7a regression: use busybear batch instead 2021-03-25 15:34:10 -04:00
Jarred Allen
73d4dd8c15 Begin work on compressed instructions 2021-03-25 14:43:10 -04:00
Domenico Ottolia
fb00d0f209 Fix bugs with privileged tests 2021-03-25 14:06:05 -04:00
Noah Boorstin
ed37e933e5 busybear: stop NOPing out atomics 
and bump regression to check for 800k instrs, up from 200k
 2021-03-25 13:29:56 -04:00
Jarred Allen
feabcf2d50 Make cache output NOP after a reset 2021-03-25 13:18:30 -04:00
Jarred Allen
e8e4e1bee2 rv64i linear control flow now working 2021-03-25 13:02:26 -04:00
Jarred Allen
1f01a12be9 Merge branch 'main' into cache 2021-03-23 23:35:36 -04:00
Noah Boorstin
355961f834 busybear: more progress 2021-03-23 14:49:30 -04:00
Jarred Allen
c16605a105 Remove deleted signal from waves 2021-03-23 14:17:17 -04:00
Jarred Allen
789c189260 Another tweak to regression-wally.py comments 2021-03-23 00:18:38 -04:00
Jarred Allen
2c4eda2ba3 Slight change to regression-wally.py comments 2021-03-23 00:02:40 -04:00
Noah Boorstin
3c131bb2bd start migrating busybear over to InstrRawD/PCD 
this breaks busybear for now
 2021-03-22 23:45:04 -04:00
Jarred Allen
507d8ed120 Merge branch 'main' into cache 2021-03-22 14:50:22 -04:00
Noah Boorstin
c4fb51fad1 regression: expect 200k instead of 100k busybear instrs 
and a minor busybear bugfix
 2021-03-22 14:47:52 -04:00
Jarred Allen
bab0e3b90f Change busybear testbench to reflect new location of InstrF 2021-03-20 18:20:27 -04:00
Jarred Allen
639a718312 Fix conflicts in ahb-waves that snuck through manual merging 2021-03-20 17:16:50 -04:00
Jarred Allen
50c961bbe4 Merge changes from main 2021-03-18 18:58:10 -04:00
Jarred Allen
bf2fbf49ee Add icache's read request to ahb wavs 2021-03-18 18:52:03 -04:00
bbracker
df51d9908d AHB bugfixes and sim waveview refactoring 2021-03-18 18:25:12 -04:00
bbracker
11ba96f2e3 maybe AHB works now 2021-03-18 17:47:00 -04:00
Shreya Sanghai
dfc86539cc Merge branch 'gshare' into main 
Conflicts:
	wally-pipelined/regression/wave.do
 2021-03-18 17:25:48 -04:00
Ross Thompson
181a28e875 Fixed minor bug with the size of gshare. 2021-03-18 16:00:09 -05:00
Teo Ene
0ff785549e Switched coremark to RV64IM 2021-03-17 22:39:56 -05:00
Jarred Allen
e39ead0460 Merge branch 'main' into cache 
Conflicts:
	wally-pipelined/testbench/testbench-imperas.sv
 2021-03-17 16:40:52 -04:00
Teo Ene
29634f1475 Temporarily reverted my last few commits 2021-03-17 15:16:01 -05:00
Teo Ene
e6661ea26a fix to last commit 2021-03-17 15:07:02 -05:00
Teo Ene
083a24c06b addition to last commit 2021-03-17 14:52:31 -05:00
Elizabeth Hedenberg
bccd37d778 fixing coremark branch prediction 2021-03-17 15:15:55 -04:00
Elizabeth Hedenberg
a3b2ffb2c9 Merge branch '3_3_2021' into main 
Making sure coremark works with spring break changes
 2021-03-17 14:11:37 -04:00
Ross Thompson
7bc95ba073 Fixed issue with sim-wally-batch. Are people still using this script? 2021-03-17 11:17:52 -05:00
Ross Thompson
0e2352a6de Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-17 11:07:57 -05:00
Ross Thompson
31ad619a21 Added possibly working OSU test bench as a precursor to running a bp benchmark. 
Fixed a few bugs with the function radix.
 2021-03-17 11:06:32 -05:00
Jarred Allen
ed68d8240b Undo accidental change 2021-03-16 18:16:00 -04:00