Commit Graph

223 Commits

Author SHA1 Message Date
David Harris
e87a269f59 Fix fcvt.lu.s bug and lint issue in packoutput 2024-05-12 11:31:27 -07:00
David Harris
380d88fc68 Merged config-shared after fma fix 2024-05-12 11:10:55 -07:00
David Harris
009d251433 Fixed cvtint bug by adding 2 bits to convert width; initial implementation of fround passes basic regression but fails some nightly regression cases 2024-05-11 22:32:51 -07:00
Katherine Parry
807ef44772 fixed fma testfloat issue #578 2024-05-10 18:12:11 -07:00
David Harris
53d6b96237 Increased NORMSHIFTSZ by 2 to fix failing testfloat cvtint with IDIV_ON_FPU=0, FLEN=32, XLEN=64 2024-05-10 13:42:52 -07:00
David Harris
66b33c09be Added Zaamo and Zalrsc support to testbench and regression 2024-05-10 05:41:00 -07:00
David Harris
ce5390de9c Fixed UNCORE_RAM_RANGE for rv64i so VCS doesn't choke 2024-05-08 19:29:36 -07:00
David Harris
77137f0f60 ZAAMO and ZALRSC implemented but not tested 2024-05-07 16:45:49 -07:00
David Harris
12c5879467 Synthesis with derived configs 2024-04-27 17:06:44 -07:00
David Harris
c7c2e94e26 Fixes for synthesis with derived configurations 2024-04-26 15:58:36 -07:00
David Harris
e2894ed278 derived nobpred_rv32gc config for coremark test 2024-04-24 04:41:25 -07:00
David Harris
00a1c0fc57 Fixed WALLY/RISCV paths in testbench/rom1p1r; search log files for warnings and errors 2024-04-21 00:02:15 -07:00
David Harris
fd6a6b2249 environment variable cleanup 2024-04-20 22:52:08 -07:00
David Harris
338f37b570 Moved getenv/getenvval declaration to config-shared so lint and regression both run 2024-04-20 17:19:42 -07:00
David Harris
db330b35b2 Removed unnecessary muxes from shiftcorrection; changed flag to --nightly in lint-wally 2024-04-16 20:57:49 -07:00
David Harris
0b3bb72280 Added missing fdh_ieee_rv64gc derived config 2024-04-06 21:48:06 -07:00
Kevin Kim
ac00eaf322 added some missing derived configs 2024-03-20 09:50:52 -07:00
Jordan Carlin
cbd61d008f
fix size of CVTLEN to support fcvtmod.w.d; add max macro to config-shared.vh 2024-03-14 14:07:15 -07:00
David Harris
39ca7093bf Merged AES changes 2024-03-10 19:17:01 -07:00
Rose Thompson
3cf6a19729
Merge branch 'main' into main 2024-03-10 10:48:21 -05:00
David Harris
2c6588d4ae Timinig optimization for radix 4 division, added missing derived config 2024-03-06 15:05:04 -08:00
Kevin Kim
2547e4c6d1 divider still works with NF+2 2024-03-03 11:17:51 -08:00
KelvinTr
01c45ab9d7 Fixed K extension changes 2024-02-28 17:05:08 -06:00
James E. Stine
171da97fe3 add config for K extensions (7 so far) 2024-02-22 12:12:56 -06:00
Kevin Kim
354e1ca5c6 lints 2024-02-19 09:06:35 -08:00
Kevin Kim
ccf8d125b7 added updated dervlist 2024-02-19 09:01:44 -08:00
David Harris
ea14162c40
Merge pull request #625 from kevindkim723/shiftcorrectionfix
added fd_rv32gc config
2024-02-08 10:38:46 -08:00
Kevin Kim
c921a3b55c added fd_rv32gc config 2024-02-08 10:10:51 -08:00
Rose Thompson
662e848ad8 Updated deriv list to correct TWOBIT predictor configs. 2024-02-06 22:15:41 -06:00
David Harris
0bc01fffbb fixed two-bit bpred configurations in derivlist.txt 2024-02-06 16:33:38 -08:00
David Harris
d71efedab5
Merge pull request #619 from ross144/main
Merged all regression tests except imperas linux boot into testbench.sv.
2024-02-06 16:19:42 -08:00
Rose Thompson
da65928f04 Fixed issue with branch deriv configs. 2024-02-06 16:07:41 -06:00
David Harris
dfee790ad7 Fixed derivative generation when derivs don't already exist. Fixed lint to print success when no failures. Added Zfh fma tests. Some fp tests not running yet. 2024-02-06 12:35:56 -08:00
David Harris
b70eb80f8e simplified derivative generation 2024-02-04 19:29:53 -08:00
Rose Thompson
a2f8d70342 Updated branch predictor derivative configs. 2024-02-04 16:53:47 -06:00
David Harris
49714cb282 Fixed assertions to throw fatal error, improved nightly regression to have passing cases 2024-01-31 21:39:18 -08:00
David Harris
a4ca024025 Lint progress 2024-01-31 20:03:14 -08:00
David Harris
111f592613 factor divsqrt out of floating-point test cases to run on more derived configs 2024-01-31 14:52:15 -08:00
David Harris
2af9282bbc Starting to add nightly regression capability using derived configs 2024-01-31 13:18:00 -08:00
David Harris
0abfe5cb55 Fixed some lint errors in derived configs 2024-01-31 11:39:59 -08:00
David Harris
0828250596 Removed unused rv64fpquad config 2024-01-30 09:52:23 -08:00
David Harris
bf7e20e846 IEEE754 derivatives for testfloat 2024-01-30 09:49:27 -08:00
David Harris
f37c7bb1f6 Incorporated RAM_LATENCY and BURST_EN as parameters rather than define in code. Still need to update testbench to use this 2024-01-30 06:27:18 -08:00
David Harris
32c102d89a All deriv tests generated, use sim/make deriv 2024-01-29 14:34:42 -08:00
David Harris
d52d2d7983 Initial derivgen working 2024-01-29 11:22:34 -08:00
David Harris
45e2317636 Added Wally github address to header comments 2024-01-29 05:38:11 -08:00
David Harris
7215f48dda coverage improvements: fixing problems running ImperasDV on coverage tests 2024-01-23 22:21:01 -08:00
David Harris
d801bf5d6c
Revert "more shiftcorrection bug fixes" 2024-01-21 10:41:14 -08:00
Kevin Kim
1459943a75 more shiftcorrection bug fixes 2024-01-21 10:08:48 -08:00
Kevin Kim
991f1494d3
Merge branch 'openhwgroup:main' into shiftcorrectiondebug 2024-01-21 08:27:33 -08:00
Kevin Kim
3241802441 fixed bug in CORRSHIFTSZ param 2024-01-21 08:25:17 -08:00
David Harris
9260d3c424 Add Zfh support to imperas.ic, use Zicond in riscof now that it is fixed in riscv-arch-test 2024-01-18 22:46:07 -08:00
David Harris
17c9be7695 Cleanup typos, remove Zicond from riscof until it is working 2024-01-18 21:36:52 -08:00
David Harris
60e09965d5 Enabled Zfh support in rv64gc 2024-01-16 11:14:43 -08:00
David Harris
bb3a7850c4 Simplified floating-point parameters in config-shared 2024-01-15 17:48:41 -08:00
David Harris
da4eca4854 Tested Zfh support using unreleased version of risch-arch-test Zfh tests. Fixed two bugs in fmv to/from int. 2024-01-15 13:24:57 -08:00
Rose Thompson
ba95e5fafd Reduced the rv64gc config to 128MiB memory. 2024-01-12 20:01:05 -06:00
David Harris
9eb6d9c8b8 Added Zicond support 2024-01-11 07:37:15 -08:00
David Harris
dc3284049c Rolled back B extension in rv32/64gc MISA because imperasDV isn't matching 2023-12-21 11:03:50 -08:00
David Harris
09ea6e6485 Set B in MISA for rv32gc and rv64gc 2023-12-20 16:29:31 -08:00
Rose Thompson
5062a8c89c Added parameter for cache's SRAM length.
Progress towards verilator support.
2023-12-18 12:50:49 -06:00
Rose Thompson
b02bd6c835 Finally we got the wally tracer working with linux. 2023-11-21 13:45:55 -06:00
Rose Thompson
b137759b45 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-11-20 10:34:36 -06:00
Rose Thompson
3594c08d4b Modified linux imperas tests to
1. enable zicclsm
2. enable logging at 7000 ms
2023-11-20 10:30:35 -06:00
David Harris
b692c913c4 Changed rv32gc to do IDIV in MDU and have k=2 copies of FDIV stages; added correct sky130 adder data; fixed feature substitution in synthesis makefile 2023-11-18 20:56:50 -08:00
David Harris
acc2db256f turn off IDIVONFPU when FSUPPORTED=0. Already checked in sim, but need it in synth too for feature sweep 2023-11-17 20:25:24 -08:00
David Harris
96556064a4 Restored RV64GC BPRED_SIZE=10 for consistent synthesis results 2023-11-17 18:31:44 -08:00
David Harris
fb135c957c Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-11-14 15:19:22 -08:00
David Harris
5e9157244b Restored Zfh to 0 for rv64gc because it breaks floating-point tests 2023-11-14 15:18:16 -08:00
Rose Thompson
bf51948616 Merge pull request #474 from davidharrishmc/dev
FP and synthesis cleanup
2023-11-14 12:03:01 -08:00
David Harris
8ba0336c6f Removed unused addins, cleaned up configuration to support half precision on RV64gc, gate unused hazard inputs to reduce critical path in rv32e 2023-11-14 11:01:58 -08:00
David Harris
5211b3aa85 Merge pull request #473 from ross144/main
Missed a few files in the last pull request.  Removes the fpga config from the linter.
2023-11-14 10:15:31 -08:00
Rose Thompson
fdb75203cb Added cbop to to rv32gc. 2023-11-14 10:55:22 -06:00
David Harris
a77bea9954 Merge pull request #472 from ross144/main
Merge Zicclsm into main branch and removes the FPGA config.  FPGA makefile now automatically creates the config when building
2023-11-14 08:34:06 -08:00
Rose Thompson
05eb5460b4 Removed fpga config. No longer needed. 2023-11-13 17:50:29 -06:00
Rose Thompson
95fc5f4a1c Towards removing the FPGA config file. 2023-11-13 17:20:26 -06:00
David Harris
571c7d3be4 Divider cleanup 2023-11-12 19:41:12 -08:00
David Harris
f437336540 Explained sqrt preshifting 2023-11-12 10:05:54 -08:00
David Harris
6ac83c776e Cleaned up number of bits in fdivsqrt 2023-11-11 15:50:06 -08:00
David Harris
2bf5143163 Bug fixes related to size of fpdivsqrt bit count and number of cycles 2023-11-11 05:58:53 -08:00
David Harris
448ced00c5 Fixed testbench-fp to reflect signal name changes 2023-11-11 04:05:34 -08:00
David Harris
d5ba8fc5e6 fdivsqrt parameter cleanup 2023-11-10 18:33:08 -08:00
David Harris
3cae2385ab Simplified out LOGRK parameter 2023-11-10 18:19:41 -08:00
Rose Thompson
b74bfbeefd Merge branch 'main' into Zicclsm 2023-11-10 16:15:32 -06:00
David Harris
953c53d065 fdivsqrt parameter cleanup 2023-11-10 09:11:15 -08:00
David Harris
4c106215f4 Started cleaning up shifting leading 1 in fdivsqrt 2023-11-10 08:46:55 -08:00
Rose Thompson
0a4ed5515b Merge branch 'main' into Zicclsm 2023-11-02 12:55:51 -05:00
Rose Thompson
7222aaa196 Enabled Zicclsm in rv64gc. 2023-11-02 12:47:40 -05:00
naichewa
e3d8162279 harris code review 3 2023-11-01 10:14:15 -07:00
naichewa
7dd3f24d6c Merge branch 'main' into spi 2023-10-30 17:01:41 -07:00
David Harris
f6a7f707bd Fixed test cases for medeleg issue 444. Also added a COMPRESSED_SUPPORTED parameter true when C or Zca is supported, and use this to get compressed hardware such as the spill logic and the +2 adder. 2023-10-30 09:56:17 -07:00
Rose Thompson
657409aec5 Addec ZICCLSM to config files and started on lsu instance. 2023-10-27 13:07:23 -05:00
David Harris
b76c371e45 Config file cleanup 2023-10-18 05:38:36 -07:00
naichewa
0ff9ce527d Merge branch 'main' into spi 2023-10-16 22:59:50 -07:00
David Harris
1a6e57f8c0 Renamed wally-config to config in many comments 2023-10-16 13:49:09 -07:00
naichewa
d5d4f9d044 transferred spi changes in ECA-authorized commit 2023-10-12 13:36:57 -07:00
David Harris
28752303be Added ZCA/ZCF/ZCD/ZCB support. Doesn't break regression, but not tested. Need to get tests for Zcb. Draft tests are in riscv-arch-test but not yet committed there 2023-10-04 12:28:12 -07:00
Ross Thompson
f863cbf366 Actually fixed non-power of 2 issue with RAS.
Added RAS swapping to branch predictor scripts and configurations.
2023-09-27 12:25:05 -05:00
Ross Thompson
95c653e7df Fixes the bpred-sim.py to support command line parameterization of the branch predictor while using the new parameterization. This is definitely a hack, but I don't see a better way. 2023-09-15 14:05:26 -05:00
Kevin Kim
dabd15e029 synth works 2023-08-26 21:11:21 -07:00