Kevin Kim
|
fb529e1640
|
updated license header
|
2023-03-06 05:41:53 -08:00 |
|
Kevin Kim
|
e80c1248a2
|
bug fix
|
2023-03-05 15:20:48 -08:00 |
|
Kevin Kim
|
3dbdf3d579
|
extend unit structural mux
|
2023-03-05 15:09:02 -08:00 |
|
Kevin Kim
|
696cfb6949
|
zbb result select mux structural
|
2023-03-05 14:57:30 -08:00 |
|
Kevin Kim
|
2ae32f75b5
|
zbc input mux structural
|
2023-03-05 14:26:31 -08:00 |
|
Kevin Kim
|
77d8f10574
|
revA signals to cnt, zbb
|
2023-03-05 14:26:24 -08:00 |
|
Kevin Kim
|
7836bc1e37
|
ALU changes
- added PreShiftAmt signal for shadd
- condinvB now muxes from B instead of mask
|
2023-03-05 14:06:24 -08:00 |
|
Kevin Kim
|
0f2360f0d7
|
bug in bctrl
- deleted the min/minu decoding for some reason.
|
2023-03-04 23:56:33 -08:00 |
|
Kevin Kim
|
6b25c64a1f
|
BSelect from OH encoding to Binary
|
2023-03-04 23:19:31 -08:00 |
|
Kevin Kim
|
a293c350ba
|
alu pre-shift
-changed ALU pre shift logic to use a 2 bit shifter instead of mux
|
2023-03-04 23:07:06 -08:00 |
|
Kevin Kim
|
7512e55699
|
added python script
-I've been using this python script to make quick changes to the bitmanip controller
|
2023-03-04 22:54:32 -08:00 |
|
Kevin Kim
|
294e024c9b
|
Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip
|
2023-03-04 22:44:09 -08:00 |
|
Kevin Kim
|
9494cf9340
|
removed rotate signal in datapath and instead packed into the new BALUControl Signal
- BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU
|
2023-03-04 22:44:03 -08:00 |
|
Kip Macsai-Goren
|
a38f7cc8a1
|
added reset values to stime and stimecmp registers
|
2023-03-04 15:06:15 -08:00 |
|
Kip Macsai-Goren
|
4cede344a1
|
Merge remote-tracking branch 'upstream/main' into bit-manip
|
2023-03-04 14:43:12 -08:00 |
|
Kevin Kim
|
f5dca0bf4f
|
zbc result mux is now structural
|
2023-03-04 09:22:21 -08:00 |
|
Kevin Kim
|
72de867e65
|
Rotate signal now gets generated in bmu ctrl
|
2023-03-03 22:57:49 -08:00 |
|
Kevin Kim
|
b315066b03
|
license comments
|
2023-03-03 21:52:34 -08:00 |
|
Kevin Kim
|
0403cfd41a
|
removed redundant signals in controller
|
2023-03-03 21:52:25 -08:00 |
|
Kevin Kim
|
8dd39fbcfb
|
b controller generates comparison signed flag and controller branch signed logic updated accordingly
|
2023-03-03 17:12:29 -08:00 |
|
Ross Thompson
|
da74ed0369
|
Merge pull request #126 from davidharrishmc/dev
ImperasDV setup
|
2023-03-03 18:01:32 -06:00 |
|
David Harris
|
876c33da5f
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-03-03 15:54:42 -08:00 |
|
Kevin Kim
|
5e01f86bc5
|
sltD signal debug. Passes regression
|
2023-03-03 12:44:33 -08:00 |
|
Kevin Kim
|
c836eea17c
|
sltD logic optimize
|
2023-03-03 12:35:40 -08:00 |
|
Kevin Kim
|
d6f8c1dd29
|
Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate
|
2023-03-03 09:54:08 -08:00 |
|
Kevin Kim
|
1c55d4a8d5
|
Merge branch 'openhwgroup:main' into bctrlmigrate
|
2023-03-03 09:53:59 -08:00 |
|
Kevin Kim
|
422b428cba
|
removed outdated b-signals in controller
|
2023-03-03 08:45:42 -08:00 |
|
Kevin Kim
|
9cad890c1a
|
comments to bctrl
|
2023-03-03 08:41:47 -08:00 |
|
Kevin Kim
|
19410b4196
|
migrated B-subarith logic into b controller
|
2023-03-03 08:40:29 -08:00 |
|
Kevin Kim
|
2c3271dd62
|
began subarith configurability optimization in controller
|
2023-03-03 08:27:11 -08:00 |
|
Ross Thompson
|
0cb5369351
|
Renamed BTB misprediction to BTA.
|
2023-03-03 00:18:34 -06:00 |
|
Ross Thompson
|
5b5677ccb8
|
Added divide cycle counter.
|
2023-03-02 23:59:52 -06:00 |
|
Ross Thompson
|
aabb454d1c
|
Added the i and d cache cycle counters.
|
2023-03-02 23:54:56 -06:00 |
|
Ross Thompson
|
cfca77172e
|
Added fence counter.
|
2023-03-02 23:29:20 -06:00 |
|
Ross Thompson
|
f32f8c109a
|
Added csr write counter, sfence vma counter, interrupt counter, and exception counter.
|
2023-03-02 23:21:29 -06:00 |
|
Ross Thompson
|
a313b10912
|
Added store stall to performance counters.
|
2023-03-02 23:10:54 -06:00 |
|
Ross Thompson
|
2dd693a3b3
|
Reordered performance counters and added space for new ones.
|
2023-03-02 23:04:31 -06:00 |
|
David Harris
|
316b8b2250
|
Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt)
|
2023-03-02 20:00:47 -08:00 |
|
Kevin Kim
|
b21ca2fba0
|
bug fix, more elegant logic changes in controller
|
2023-03-02 16:00:56 -08:00 |
|
Kevin Kim
|
c9bd37c92b
|
formatting
|
2023-03-02 15:28:43 -08:00 |
|
Kevin Kim
|
910eeea3ff
|
removed main instruction decoder dependence on bmu controller
|
2023-03-02 15:28:33 -08:00 |
|
Kevin Kim
|
05b329dd6a
|
added bitmanip illegal instruction signal
|
2023-03-02 15:09:55 -08:00 |
|
Kevin Kim
|
3e8e633a56
|
zbc comments
|
2023-03-02 13:52:00 -08:00 |
|
Kevin Kim
|
b0307f5082
|
formatted bmu decoder
|
2023-03-02 13:45:15 -08:00 |
|
Kevin Kim
|
24b0b83d52
|
moved ALUControlD into configurable block
|
2023-03-02 12:17:03 -08:00 |
|
Kevin Kim
|
0f60505179
|
moved SubArith and RegWriteE into configurable block
|
2023-03-02 12:15:57 -08:00 |
|
Kevin Kim
|
b81a5e4452
|
added BRegWriteE signal
|
2023-03-02 12:15:22 -08:00 |
|
Kevin Kim
|
5e10720bed
|
rename shifternew to shifter
|
2023-03-02 11:45:32 -08:00 |
|
Kevin Kim
|
cf324510f3
|
zbc input select mux optimize
|
2023-03-02 11:43:05 -08:00 |
|
Kevin Kim
|
657719220a
|
zbc select mux optimization
|
2023-03-02 11:40:29 -08:00 |
|
Kevin Kim
|
e62a752522
|
fixed controller lint, changed byte unit mux select name and input width
|
2023-03-02 11:36:12 -08:00 |
|
Kevin Kim
|
a5e2e24320
|
removed redundant zbs
|
2023-03-02 11:22:09 -08:00 |
|
Ross Thompson
|
b98e007a53
|
Cleaned up branch predictor performance counters.
|
2023-03-01 17:05:42 -06:00 |
|
David Harris
|
5c8c50adba
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-03-01 11:18:05 -08:00 |
|
David Harris
|
23775c6d67
|
Renamed I/D TLBMissOrDAFault to TLBMissOrUpdateDA for consistency with UpdateDA
|
2023-03-01 11:18:00 -08:00 |
|
Ross Thompson
|
90b2f0a652
|
Set bp to use instruction class prediction by default.
|
2023-03-01 11:52:42 -06:00 |
|
Ross Thompson
|
dea6b643a6
|
Branch predictor cleanup.
I think Ch 10 is now done except for BTB performance analysis and the section on running benchmarks and collecting data.
|
2023-03-01 11:24:24 -06:00 |
|
Ross Thompson
|
03a6679ba0
|
More btb cleanup.
|
2023-03-01 10:47:00 -06:00 |
|
Ross Thompson
|
554e7d0973
|
Minor fix to btb.
|
2023-03-01 10:45:40 -06:00 |
|
Ross Thompson
|
a6917d07f3
|
Name cleanup.
|
2023-02-28 17:48:58 -06:00 |
|
Kip Macsai-Goren
|
58ab6ec805
|
Merge remote-tracking branch 'upstream/main' into bit-manip
|
2023-02-28 14:41:51 -08:00 |
|
Kip Macsai-Goren
|
f63748f097
|
Merge remote-tracking branch 'origin' into bit-manip
|
2023-02-28 14:39:57 -08:00 |
|
Ross Thompson
|
4c0e7f297a
|
Found the performance bug with the branch predictor btb power saving update.
|
2023-02-28 15:57:34 -06:00 |
|
Ross Thompson
|
2ebe600f54
|
Name changes to reflect diagrams.
|
2023-02-28 15:37:25 -06:00 |
|
Ross Thompson
|
be4823f7dd
|
Undid the btb update as it reduces performance.
|
2023-02-28 15:21:56 -06:00 |
|
Kevin Kim
|
df0d75034b
|
bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG]
|
2023-02-28 12:09:35 -08:00 |
|
Kevin Kim
|
b61d881c1b
|
added BRegWrite, BW64, BALUOp signals to bctrl and controller
-TODO: Main decode in bmuctrl must assert these 3 signals
|
2023-02-28 11:54:10 -08:00 |
|
Kevin Kim
|
692e406976
|
changed shifter source select signal name
|
2023-02-28 11:41:40 -08:00 |
|
Kevin Kim
|
1506d50c63
|
rename result back to ALUResult in ALU
|
2023-02-28 07:27:34 -08:00 |
|
Ross Thompson
|
9dd3379744
|
This icpred and btb changes are causing a performance issue.
|
2023-02-27 20:00:50 -06:00 |
|
Ross Thompson
|
544abe2819
|
Modified the BTB to save power by not updating when the prediction is unchanged.
|
2023-02-27 17:37:29 -06:00 |
|
Ross Thompson
|
bc5aecf948
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-02-27 09:48:03 -06:00 |
|
David Harris
|
cf8b5f0783
|
Added support for ZMMUL
|
2023-02-27 07:29:53 -08:00 |
|
Ross Thompson
|
318189e5e6
|
Signal name changes.
|
2023-02-27 00:39:19 -06:00 |
|
David Harris
|
f40352e82b
|
hptw typo fix
|
2023-02-26 19:38:34 -08:00 |
|
Ross Thompson
|
c89812b2d4
|
Branch predictor cleanup.
|
2023-02-26 21:28:36 -06:00 |
|
David Harris
|
e9ad6ae057
|
Simplified Access fault logic in HPTW
|
2023-02-26 18:50:37 -08:00 |
|
David Harris
|
2d7145901b
|
StoreAmo faults are generated instead of load faults on AMO operations
|
2023-02-26 18:35:10 -08:00 |
|
Ross Thompson
|
e8c5e5b5ff
|
Create module for instruction class prediction and decoding.
|
2023-02-26 20:20:30 -06:00 |
|
Ross Thompson
|
3964ce3309
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
|
2023-02-26 19:58:24 -06:00 |
|
David Harris
|
21b28fd1bb
|
Renamed DAPageFault to UpdateDA
|
2023-02-26 17:51:45 -08:00 |
|
David Harris
|
4274071333
|
renamed UpperBitsUnequalPageFault to UpperBitsUnequal
|
2023-02-26 17:32:34 -08:00 |
|
David Harris
|
06bd4783af
|
moved tlb to subdirectory
|
2023-02-26 17:31:03 -08:00 |
|
David Harris
|
c774b44116
|
Moved TLB into subdirectory of MMU
|
2023-02-26 17:28:05 -08:00 |
|
Ross Thompson
|
72be4318b8
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
|
2023-02-26 12:06:06 -06:00 |
|
David Harris
|
dc447ed5ed
|
Removed unneeded TLBFlush from TLBMiss
|
2023-02-26 10:04:16 -08:00 |
|
David Harris
|
54b8e7c629
|
Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit)
|
2023-02-26 09:58:34 -08:00 |
|
David Harris
|
35653a18b7
|
Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED
|
2023-02-26 09:38:32 -08:00 |
|
David Harris
|
f31764c3e1
|
Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol
|
2023-02-26 07:12:43 -08:00 |
|
David Harris
|
fe161f6bde
|
Fixed missing assign when SSTC is not supported
|
2023-02-26 07:12:13 -08:00 |
|
David Harris
|
8895114152
|
Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0
|
2023-02-26 06:30:43 -08:00 |
|
Ross Thompson
|
7f8034013d
|
PHT was enabled using the wrong ~flush and ~stall.
|
2023-02-24 22:57:32 -06:00 |
|
Ross Thompson
|
eb9dc7e67d
|
gshare cleanup.
|
2023-02-24 22:55:51 -06:00 |
|
Ross Thompson
|
9df05f0b3d
|
More signal renames.
|
2023-02-24 19:56:55 -06:00 |
|
Ross Thompson
|
8bd4a4c35b
|
Renamed signals to match new figures.
|
2023-02-24 19:51:47 -06:00 |
|
Kevin Kim
|
f5d3e0e8a0
|
removed old shifter
|
2023-02-24 17:33:47 -08:00 |
|
Ross Thompson
|
f95f326b3d
|
Renamed signals to match figure 10.18.
|
2023-02-24 19:22:14 -06:00 |
|
Kevin Kim
|
601c6fcdc4
|
removed now-redundant zero-extend mux in alu
|
2023-02-24 17:14:12 -08:00 |
|
Kevin Kim
|
1d4200e3a3
|
took sign extension out of shifter
|
2023-02-24 17:09:56 -08:00 |
|
Ross Thompson
|
40a164a8da
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-02-24 18:50:35 -06:00 |
|
Ross Thompson
|
4031b89f18
|
Possible fix to btb performance issue.
|
2023-02-24 18:36:41 -06:00 |
|
Ross Thompson
|
ea8cb7dd78
|
Cleanup.
|
2023-02-24 18:20:42 -06:00 |
|
Ross Thompson
|
a14dcaa241
|
Completed critical path gshare fix.
|
2023-02-24 18:02:00 -06:00 |
|
Ross Thompson
|
31d6531af2
|
Prep to fix gshare critical path.
|
2023-02-24 17:54:48 -06:00 |
|
Ross Thompson
|
5db56460b9
|
Modified btb forwarding logic to reduce critical path.
|
2023-02-24 17:47:43 -06:00 |
|
Kevin Kim
|
00a0170b30
|
optimized mux to shifter, passes rv32/64i
|
2023-02-24 12:09:34 -08:00 |
|
Kip Macsai-Goren
|
f77d8206ec
|
Merge remote-tracking branch 'upstream/main' into bit-manip
|
2023-02-24 09:28:24 -08:00 |
|
David Harris
|
adfc01fc5a
|
Fixed special cases of address decoder and documented better
|
2023-02-24 07:52:46 -08:00 |
|
Kevin Kim
|
8b6d699857
|
small optimization to condzext select
|
2023-02-23 21:57:28 -08:00 |
|
Ross Thompson
|
2920179435
|
Major cleanup of bp.
|
2023-02-23 16:19:03 -06:00 |
|
Ross Thompson
|
fa49de8391
|
Partial replacement of InstrClassX with {JalX, RetX, JumpX, and BranchX}.
|
2023-02-23 15:55:34 -06:00 |
|
Kip Macsai-Goren
|
cb3990c77d
|
Merge remote-tracking branch 'upstream/main' into main
|
2023-02-23 13:33:45 -08:00 |
|
Ross Thompson
|
8503982328
|
Branch predictor cleanup.
|
2023-02-23 15:15:14 -06:00 |
|
Ross Thompson
|
403b2b7be1
|
Moved more branch predictor logic into the performance counter block.
|
2023-02-23 15:14:56 -06:00 |
|
Ross Thompson
|
526f046fb0
|
Added if generate around bp logic only used with performance counters.
|
2023-02-23 14:39:31 -06:00 |
|
Ross Thompson
|
2d919fa9e3
|
Renamed PCPredX to BTAX.
|
2023-02-23 14:33:32 -06:00 |
|
Kip Macsai-Goren
|
67f83cda7f
|
Fixed lint errors on zero and pop count. All of regression passes
|
2023-02-22 20:25:51 -08:00 |
|
Kip Macsai-Goren
|
ba3bfdf68b
|
Manual attempt to merge with upstream changes
|
2023-02-22 19:42:30 -08:00 |
|
Kip Macsai-Goren
|
cc47bd8bea
|
Merge remote-tracking branch 'upstream/main' into main
|
2023-02-22 15:47:54 -08:00 |
|
Ross Thompson
|
c736d7c1f3
|
Fixed bug in basic gshare.
|
2023-02-22 12:54:46 -06:00 |
|
Ross Thompson
|
849856034b
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2023-02-22 09:11:57 -06:00 |
|
Ross Thompson
|
5dde3af22e
|
Oups. Turns out dc_shell does not like string parameters.
Switched gshare to use an integer parameter to select between gshare and global.
|
2023-02-22 09:11:46 -06:00 |
|
Kip Macsai-Goren
|
d668c563f4
|
Merge remote-tracking branch 'upstream/main' into main
|
2023-02-21 14:48:41 -08:00 |
|
Kevin Kim
|
35bd4f7219
|
added individual zb tests in tests.vh and testbench
- also minor alu/controller configurability changes
|
2023-02-21 11:52:05 -08:00 |
|
David Harris
|
f0566173e6
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-02-21 09:58:18 -08:00 |
|
David Harris
|
b59df0fca7
|
Fixed Issue #65 fmv sign selection. Sign needs to come from most significant bit of raw X source without doing NaN Box fixes first.
|
2023-02-21 09:57:57 -08:00 |
|
David Harris
|
a445e53e8d
|
Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well.
|
2023-02-21 09:32:17 -08:00 |
|
Ross Thompson
|
7f0d64d0a6
|
Fixed typo in the global branch predictor.
|
2023-02-20 18:48:02 -06:00 |
|
Ross Thompson
|
2c2c1b5221
|
Cleanup branch predictor files.
|
2023-02-20 18:45:45 -06:00 |
|
Ross Thompson
|
7df3a84060
|
Renamed branch predictors and consolidated global and gshare predictors.
|
2023-02-20 18:42:37 -06:00 |
|
Ross Thompson
|
6eefa5b1e3
|
Fixed another bug in the btb.
|
2023-02-20 17:54:22 -06:00 |
|
Ross Thompson
|
d2b7047744
|
Fixed forwarding bug in the BTB.
|
2023-02-20 17:03:45 -06:00 |
|
Ross Thompson
|
fdd007a903
|
Found a bug where the d and i cache misses were not recorded in the performance counters.
|
2023-02-20 16:00:29 -06:00 |
|
Ross Thompson
|
545af7697f
|
Simiplified BTB.
|
2023-02-20 15:39:42 -06:00 |
|
David Harris
|
1028fd1053
|
Removed test code that broke LSU
|
2023-02-20 12:42:46 -08:00 |
|
David Harris
|
da61d11de1
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2023-02-20 11:28:15 -08:00 |
|
David Harris
|
36b2d530c4
|
Merge pull request #98 from ross144/main
New gshare implementation
|
2023-02-20 11:27:47 -08:00 |
|
David Harris
|
801f4a68b7
|
Extraction script updates to match new reports names
|
2023-02-20 10:16:45 -08:00 |
|
David Harris
|
4cc8448b16
|
Removed unused and incomplete ROM macro instantations
|
2023-02-20 05:59:57 -08:00 |
|
David Harris
|
626715befd
|
Fixed IROM size parameters
|
2023-02-20 05:32:43 -08:00 |
|
David Harris
|
472c7da399
|
New expression for BTB_SIZE to avoid error during sky90 synthesis
|
2023-02-20 04:02:00 -08:00 |
|
Ross Thompson
|
4db249ca5d
|
Simplified BTB by removing the valid bit. the instruction class provides the equivalent information.
|
2023-02-19 23:53:20 -06:00 |
|
Ross Thompson
|
407d9e7b4a
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-02-19 22:54:27 -06:00 |
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Ross Thompson
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0f98cfe5b4
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Simplified branch predictor.
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2023-02-19 22:49:48 -06:00 |
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David Harris
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d07c6386b2
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Added BTB_SIZE parameter independent of BPRED_SIIZE
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2023-02-19 20:13:50 -08:00 |
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David Harris
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20ced0653c
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Parameterized btb to depend on BPRED_SIZE
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2023-02-19 19:59:07 -08:00 |
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Kip Macsai-Goren
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65a5b86dd8
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Merge remote-tracking branch 'upstream/main' into main
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2023-02-19 16:37:18 -08:00 |
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David Harris
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5287c54278
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Adjusted DTIM to always be 512B independent of XLEN
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2023-02-19 16:14:38 -08:00 |
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David Harris
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00d54cfe6c
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PMP checker size check to avoid spurious warnings
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2023-02-19 16:08:23 -08:00 |
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David Harris
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fa0406b554
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Moved conditional instantiation outside pmpchecker
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2023-02-19 15:31:00 -08:00 |
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David Harris
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8db49c83c4
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Disabled W64M register for RV32
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2023-02-19 07:03:31 -08:00 |
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David Harris
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527566c38a
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Fixed RAM instantiations
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2023-02-19 06:31:41 -08:00 |
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Ross Thompson
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89aa57e25e
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Possibly much better branch predictor implemention.
The complexity is significantly reduced.
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2023-02-19 00:17:37 -06:00 |
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Kevin Kim
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0f876c3111
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B DONE (for now)
- datapath passes along comparator flag to alu
- controllers and zbb handle min/max instructions
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2023-02-18 22:12:55 -08:00 |
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Ross Thompson
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9f997eb5d0
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Minor fix.
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2023-02-18 23:55:46 -06:00 |
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Kevin Kim
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2319661b10
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controlleres and zbb handle byte instructions
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2023-02-18 21:06:55 -08:00 |
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Kevin Kim
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e7339902ae
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alu and controllers handle andn, orn, xnor
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2023-02-18 20:57:07 -08:00 |
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Kevin Kim
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59e9c7c747
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added logic to handle sign/zero extend instructions
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2023-02-18 20:32:40 -08:00 |
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Kevin Kim
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ad63699aac
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fixed ctlzw bug in count unit
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2023-02-18 20:12:30 -08:00 |
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Kevin Kim
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ecfcad20a0
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zbb handles count instructions
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2023-02-18 20:12:17 -08:00 |
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Kevin Kim
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543dc1e36a
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fixed bmuctrl decode bug
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2023-02-18 20:11:50 -08:00 |
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Kevin Kim
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446327215d
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updated comments in bmuctrl
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2023-02-18 19:57:10 -08:00 |
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Kevin Kim
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baff2c9362
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rotate instructions now handled in ZBB unit
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2023-02-18 19:56:54 -08:00 |
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Kevin Kim
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e4085764e7
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removed redundant decode logic in bmuctrl
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2023-02-18 19:50:36 -08:00 |
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Kevin Kim
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f18cd53dee
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began ZBB integration into ieu
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2023-02-18 19:44:14 -08:00 |
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Kevin Kim
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5f56f72bb1
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bmuctrl handles roriw
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2023-02-18 16:26:16 -08:00 |
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Kip Macsai-Goren
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9c3aa55349
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merge upstream synth changes
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2023-02-18 14:35:19 -08:00 |
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David Harris
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92d4acf118
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Removed unused PredInstrClassE register from bpred
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2023-02-18 05:59:25 -08:00 |
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David Harris
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1af99c7aee
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Removed unused weq0M register fron fdivsqrtpostproc
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2023-02-18 05:57:39 -08:00 |
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David Harris
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adc22235be
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Fixed issue #57 of sign selection for improperly NaN-boxed number
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2023-02-18 05:34:40 -08:00 |
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David Harris
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7923d32c3a
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Fixed unpacking of illegal NaN box. Fixed issue #56 of sign injection NaN
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2023-02-18 05:25:38 -08:00 |
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Kevin Kim
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2ccbde9d09
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configured shifter in alu
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2023-02-17 21:58:49 -08:00 |
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Kevin Kim
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f85c1058ff
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shifter bug fix
- roli not passing unless I keep the MSB (instead of inverting) of truncated offset
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2023-02-17 21:58:26 -08:00 |
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Kevin Kim
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77fc40149f
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controller supports some rotates
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2023-02-17 21:57:34 -08:00 |
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Kevin Kim
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5e7ed8804f
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bmuctrl supports some rotates
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2023-02-17 21:57:19 -08:00 |
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David Harris
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63a6567ed3
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Created PostBox signal to NaN-box malformed NaNs of excess length. Fixes Issue #55
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2023-02-17 20:51:43 -08:00 |
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Kevin Kim
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9af0ffe3a9
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added zero extend, pre-shift mux to ALU
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2023-02-17 20:15:12 -08:00 |
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Kevin Kim
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cad0973b6b
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more elegant ZBA logic in controller
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2023-02-17 20:14:47 -08:00 |
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Kevin Kim
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88d7c3b1f2
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bmuctrl handles .uw instructions
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2023-02-17 20:14:13 -08:00 |
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David Harris
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154d7eb9ef
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Fixed RAM bugs and refactored with read taking place after clock edge rather than before.
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2023-02-17 19:14:38 -08:00 |
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Kevin Kim
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01f3cc2838
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controller supports ZBA instructions
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2023-02-17 16:44:16 -08:00 |
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Kevin Kim
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b09d942d60
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removed Funct7 in Execute Stage
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2023-02-17 16:12:09 -08:00 |
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David Harris
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daf2f822c2
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Memory synthesis updates
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2023-02-17 15:33:49 -08:00 |
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David Harris
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3f2f48ddc6
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Continue fixing memory macros for synthesis
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2023-02-17 15:15:37 -08:00 |
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Ross Thompson
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ae8b01b8d4
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Renamed globalhistory predictor.
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2023-02-17 16:08:34 -06:00 |
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Ross Thompson
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2661ec97d8
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Fixed global history predictor.
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2023-02-17 16:05:48 -06:00 |
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Ross Thompson
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a98a85f144
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More updates.
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2023-02-17 15:53:49 -06:00 |
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Ross Thompson
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1d9335c934
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Updated global history predictor.
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2023-02-17 15:53:15 -06:00 |
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David Harris
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aba29f6cc8
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Synthesis with memories
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2023-02-17 13:51:05 -08:00 |
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Ross Thompson
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e0a8974c7d
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Fixed a branch predictor performance issue.
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2023-02-17 15:37:03 -06:00 |
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Kevin Kim
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a1570a88c9
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bmuctrl checks for illegal zbs-style instructions
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2023-02-17 12:54:08 -08:00 |
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Kevin Kim
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370ff54875
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bctrl bug fix
- bctrl decodes shift immediate instructions properly
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2023-02-17 11:16:29 -08:00 |
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Kevin Kim
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aba4eb80d4
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alu bug fix
- condmaskb piped in correctly instead of b
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2023-02-17 11:02:07 -08:00 |
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Kevin Kim
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07eaf146c2
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alu looks at BSelect, added BSelect one hot signal
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2023-02-17 09:51:49 -08:00 |
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Ross Thompson
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c97fa02300
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Merge branch 'main' of github.com:ross144/cvw
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2023-02-17 10:58:16 -06:00 |
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Ross Thompson
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3398c5156b
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Fixed bug with branch predictor.
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2023-02-17 10:57:50 -06:00 |
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Kevin Kim
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323d14f9d9
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added alu changes to previous commit
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2023-02-17 08:22:13 -08:00 |
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Kevin Kim
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44c9612a5c
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added BSelect Signal
- BSelect [3:0] is a one hot encoding of if it's a ZBA_ZBB_ZBC_ZBS instruction
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2023-02-17 08:21:55 -08:00 |
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Kevin Kim
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ada6023a41
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comments
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2023-02-17 07:53:14 -08:00 |
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Kevin Kim
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ab542a5bc3
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comments
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2023-02-17 07:52:54 -08:00 |
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