Commit Graph

10312 Commits

Author SHA1 Message Date
Jordan Carlin
1675e4cb7d
Add rv32 wally-riscv-arch-test lockstep to nightly 2024-11-16 11:53:05 -08:00
Jordan Carlin
41a2326609
Merge pull request #1105 from davidharrishmc/dev
Changed reservation set size to one word
2024-11-16 11:50:52 -08:00
David Harris
45f6cb055d Changed reservation set size to one word to fix RV32GC lrsc privileged test failure Issue #1092 2024-11-16 11:47:45 -08:00
Jordan Carlin
b6b1fc82ab
Merge pull request #1104 from davidharrishmc/dev
Privileged functional coverage tests run in regression-wally --fcov
2024-11-16 10:27:12 -08:00
David Harris
98f2ec6d66 Updated regression-wally --fcov to run privileged tests in lockstep 2024-11-16 09:58:04 -08:00
David Harris
234e47a7c5 MTIMECMP should reset to maximum value for RV32, not just for RV64 2024-11-15 15:37:25 -08:00
David Harris
d4852d88e2
Merge pull request #1101 from rosethompson/main
Fixed the tracer so that traps don't clear the instruction or PC bits.
2024-11-15 06:33:28 -08:00
Rose Thompson
fcf4ca1417 Disabled tracer print. 2024-11-15 08:32:43 -06:00
Rose Thompson
3596be433c Fixed the tracer so that traps don't clear the instruction or PC bits. 2024-11-15 08:31:19 -06:00
Rose Thompson
fbd89eef83
Merge pull request #1100 from davidharrishmc/dev
Fixed tracer warnings, removed fcovimp support
2024-11-15 08:00:10 -06:00
David Harris
cb4f1bec8e Removed fcovimp support 2024-11-15 05:58:30 -08:00
David Harris
c02a649c3b Fixed warnings related to tracer variables 2024-11-15 05:33:16 -08:00
David Harris
d4ecaa5401
Merge pull request #1099 from 10x-Engineers/rvvi_setup
Removing old code (not in use anymore)
2024-11-15 04:57:29 -08:00
Huda-10xe
b2789f304a Removing old code (not in use anymore) 2024-11-15 00:39:16 -08:00
David Harris
e5e592b2da
Merge pull request #1091 from jordancarlin/rvvi32
Fix RVVI for RV32
2024-11-14 15:33:48 -08:00
Jordan Carlin
9d2a5c6e03
Fix wallyTracer bug 2024-11-14 15:31:10 -08:00
Jordan Carlin
51d7eea98a
Merge branch 'main' of https://github.com/openhwgroup/cvw into rvvi32 2024-11-14 15:04:11 -08:00
Jordan Carlin
61c5d035e9
Add mseccfg shell to wallyTracer and reformat CSRs 2024-11-14 15:03:13 -08:00
Jordan Carlin
3dbfc2f9fc
Merge pull request #1098 from rosethompson/main
Fixes issue with traps hidding instructions on rvvi interface
2024-11-14 14:44:20 -08:00
Rose Thompson
d311ee238c
Merge branch 'openhwgroup:main' into main 2024-11-14 16:15:26 -06:00
Rose Thompson
5e4f4c2072 Simple change to ensure Trapped instructions are included with rvvi as
valid instructions. Required for functional coverage.
2024-11-14 16:14:02 -06:00
Rose Thompson
06fb807839
Merge pull request #1096 from davidharrishmc/dev
XLEN32 support for functional coverage, restore WALLY-init-lib
2024-11-14 15:28:20 -06:00
Jordan Carlin
60bc968b29
Merge pull request #1097 from slmnemo/main
Fixed oversight in assertions on verilator causing nocache_rv64gc and nodcache_rv64gc to fail
2024-11-14 12:02:37 -08:00
slmnemo
872491716d set ZICCLSM_SUPPORTED to 0 so that nocache_rv64gc does not fail assertion tests 2024-11-14 12:00:45 -08:00
David Harris
4251f0c6a2 Restored to original WALLY-init-lib beause new flavor is moved to cvw-arch-verif and the old is needed for PMP code coverage 2024-11-14 10:56:13 -08:00
David Harris
8e6170cc83 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-11-14 08:15:44 -08:00
David Harris
054c694a27 Fixed typo of CLINT name 2024-11-14 08:14:56 -08:00
David Harris
eacc8c0f07 Define XLEN32/XLEN64 in coverage configuration 2024-11-14 08:14:22 -08:00
David Harris
669855ad25
Merge pull request #1093 from AnonymousVikram/fflag_fix
Fflag Fix
2024-11-14 04:33:58 -08:00
Vikram Krishna
0c0949e82b added explanation 2024-11-14 03:54:32 -08:00
Vikram Krishna
eb777d3fa4 updated froundnx conditional 2024-11-14 03:53:26 -08:00
Vikram Krishna
4aecba2a51 added handling for OpCode=100 2024-11-14 03:51:27 -08:00
Jordan Carlin
14e9a39523
pmps working for RVVI in RV32 2024-11-13 22:12:11 -08:00
Jordan Carlin
d666a0dd7b
Update formatting in an attempt to understand what's happening in this file 2024-11-13 18:26:53 -08:00
Jordan Carlin
017b3e9872
Fix 32 bit CSRs in wallyTracer 2024-11-13 17:01:01 -08:00
Rose Thompson
88745e27d3 Fixed ila after updates. 2024-11-13 12:57:02 -06:00
David Harris
7ecd6fa991
Merge pull request #1090 from rosethompson/lrufixes
Fixes multiple cache bugs and CacheSim.py bugs
2024-11-13 10:32:20 -08:00
Rose Thompson
a7dd2eff01 Switch rv64gc_CacheSim.py to use verilator as the default sim rather than questa. 2024-11-13 12:29:02 -06:00
Rose Thompson
e22f30ec14 Better name for CacheSetTag2. 2024-11-13 12:24:35 -06:00
Rose Thompson
db3a7d5bbd More code cleanup for CacheSim.py 2024-11-13 10:45:33 -06:00
Jordan Carlin
b58fda89bd
Merge pull request #1088 from rosethompson/main
Fixes lint warnings in loggers.sv updates spi device tree for vcu108
2024-11-13 08:39:32 -08:00
Rose Thompson
77d47e531f Merge branch 'main' into lrufixes 2024-11-13 10:34:21 -06:00
David Harris
b6c69fa8a3
Merge pull request #1089 from coreyqh/dev
Add ZicsrF coverage to fcov
2024-11-13 03:02:01 -08:00
David Harris
585a1df8c2
Merge pull request #1085 from Daniyal-R-A/Z_enable
Enabling Bit manipulation Instructions in coverage.svh files
2024-11-13 03:01:43 -08:00
Rose Thompson
2fe73f8174 Replaced double | and & with single. We were having issues with these verilator giving a warning about the parameter widths not matching. However the warning is not occuring anymore. 2024-11-13 00:02:51 -06:00
Rose Thompson
8993432928 Resolved issue with questa not liking the TEST +arg as a generate. 2024-11-12 23:57:30 -06:00
Corey Hickson
dcaef2080b Add ZicsrF coverage to fcov 2024-11-12 19:09:50 -08:00
Rose Thompson
ef7072b7c2 Merge branch 'main' into lrufixes 2024-11-12 17:57:28 -06:00
Rose Thompson
5346680758 Final code cleanup. 2024-11-12 17:52:16 -06:00
Rose Thompson
b8cafb5198 More code cleanup. 2024-11-12 17:51:22 -06:00