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Switch rv64gc_CacheSim.py to use verilator as the default sim rather than questa.
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@ -65,7 +65,7 @@ def main():
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parser = argparse.ArgumentParser(description="Runs the cache simulator on all rv64gc test suites")
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parser.add_argument('-p', "--perf", action='store_true', help="Report hit/miss ratio")
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parser.add_argument('-d', "--dist", action='store_true', help="Report distribution of operations")
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parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="questa")
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parser.add_argument('-s', "--sim", help="Simulator", choices=["questa", "verilator", "vcs"], default="verilator")
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args = parser.parse_args()
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simargs = "I_CACHE_ADDR_LOGGER=1\\\'b1 D_CACHE_ADDR_LOGGER=1\\\'b1"
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testcmd = "wsim --sim " + args.sim + " rv64gc {} --params \"" + simargs + "\" > /dev/null"
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