Commit Graph

3893 Commits

Author SHA1 Message Date
slmnemo
141f2a40e4 UART updates and PMA fix 2022-07-22 14:49:03 -07:00
Daniel Torres
574e603d69 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-22 13:52:19 -07:00
Daniel Torres
139e657fcc commented out embench test that should be commented out 2022-07-22 13:52:13 -07:00
slmnemo
df411497e0 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-07-22 12:36:06 -07:00
slmnemo
9cca567136 Added test comments to reference output 2022-07-22 12:35:59 -07:00
slmnemo
cb16a75119 Added PLIC test to regression 2022-07-22 12:35:37 -07:00
cturek
e2691c02b7 Square root negative exponent handling 2022-07-22 16:45:19 +00:00
slmnemo
d38369e8bf Added new PLIC and UART tests 2022-07-22 07:12:55 -07:00
slmnemo
df568fd202 Added PLIC and UART tests and new functions to the test library 2022-07-22 07:10:39 -07:00
David Harris
d22587090b Reset MSR on read 2022-07-22 04:29:27 +00:00
Daniel Torres
c29a60c198 changed gitignore, updated version of arch tests on main build 2022-07-21 21:10:15 -07:00
Daniel Torres
ae0f8de2b5 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-21 20:59:01 -07:00
Daniel Torres
8dcb794bbb added support for new version of riscof and arch tests, now supports tests that can be compiled for both rv32 and rv64 2022-07-21 20:58:58 -07:00
slmnemo
95822b77f0 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-07-21 20:35:52 -07:00
slmnemo
3d2c6683d8 Fixed UART bug related to parity and MSR/LSR 2022-07-21 20:35:46 -07:00
cturek
8bfb233204 Changed testbench to operate on two inputs and one output, changed all test generators, changed srt module to return only one output and take in Mod as a signal to compute integer remainder 2022-07-22 01:27:08 +00:00
cturek
c7e84f8e40 Renamed variables, moved output handling to postprocessor, added remainder handling 2022-07-21 20:45:08 +00:00
Daniel Torres
9421b77613 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-21 12:50:04 -07:00
Daniel Torres
635a02cf6a made makefile more specific, just incase future additions 2022-07-21 12:50:02 -07:00
Daniel Torres
a8faddf81f removed ugly /ref/Ref from tests.vh, added back d_fsd-align-01.S and d_fld-align-01.S tests to tests.vh, updated makefile to fix the riscof issues and fix fld fsd tests, updated testbench.sv for comptability with changes 2022-07-21 12:47:51 -07:00
Katherine Parry
0630e2a9a2 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-21 19:38:15 +00:00
Katherine Parry
fbe8bb2298 radix-4 division integrated into srt - not tested 2022-07-21 19:38:06 +00:00
cturek
86ebdd05f0 Division working too 2022-07-21 17:59:10 +00:00
cturek
4793267bd7 Updated Radix2 Sqrt to follow new algorithm 2022-07-21 17:36:21 +00:00
Daniel Torres
16e4260dda fixed gitmodules 2022-07-21 10:15:13 -07:00
Daniel Torres
7f447853c3 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-07-21 10:14:20 -07:00
Daniel Torres
e46e96e080 changed the default branch of embench 2022-07-21 10:14:05 -07:00
Katherine Parry
7950a675ea added input enables and improved forwarding 2022-07-21 01:20:06 +00:00
Katherine Parry
a30d9c6bd8 turn off 2 word store durring non-fp instructions 2022-07-20 21:57:23 +00:00
Katherine Parry
b26297e874 moved ctrl signal registers into fctrl, also a lot of code cleaning 2022-07-20 02:27:39 +00:00
cturek
cce57fdcc5 divsqrt working for floating point 2022-07-20 02:04:20 +00:00
cturek
4e64acf843 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-20 02:00:50 +00:00
cturek
c3a4a2abdf New radix-2 algorithm implemented and working 2022-07-20 02:00:43 +00:00
David Harris
2b3a5ebefb Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-20 01:49:36 +00:00
David Harris
36bd17984b Reordered embench Makefile to run size tests first 2022-07-20 01:49:33 +00:00
cturek
0f94177765 small changes 2022-07-20 01:36:25 +00:00
Katherine Parry
70d2b2fdd7 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-19 23:44:41 +00:00
Katherine Parry
d61f84e751 oprimized zeros and replaced complex ?: with always_comb 2022-07-19 23:44:37 +00:00
Daniel Torres
20800b2714 embench no longer launches run automatiacally, need to use make run 2022-07-19 15:16:12 -07:00
Daniel Torres
5b1adc7a67 commented out embench 2.0 tests 2022-07-19 13:36:18 -07:00
Daniel Torres
0668659ac9 made changes to makefile, now builds fastest version (RV64im) by default. Also removed redundent CFLAG funroll-all-loops (was duplicated) 2022-07-19 13:17:02 -07:00
slmnemo
37bf837d48 fixed GPIO test by adding a new function to clear PLIC interrupts 2022-07-19 08:59:16 -07:00
David Harris
8e2069b115 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-19 02:58:13 +00:00
David Harris
b13b49658b Removed duplicate -march from CoreMark makefile 2022-07-19 02:58:07 +00:00
Katherine Parry
514674417e moved Se into execute stage 2022-07-19 01:10:10 +00:00
Katherine Parry
64b3e4117b reworked fmashiftcalc to match book 2022-07-19 00:04:24 +00:00
David Harris
630110e73e Coremark cleanup 2022-07-18 16:48:13 -07:00
David Harris
9fd772ce83 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-18 23:11:12 +00:00
David Harris
1e87673321 Cleaned up Coremark makefile 2022-07-18 23:10:22 +00:00
Katherine Parry
c89f7f31cc Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-07-18 20:49:01 +00:00