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12b978fec2
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Author SHA1 Message Date
Ross Thompson
12b978fec2 Eliminated extra register and fixed ports to icache. 
Still need to support physical tag check and write in icache memory.
Still need to reduce to 1 port SRAM in icache.
I would like to refactor the icache code.
 2021-05-03 12:04:54 -05:00
Ross Thompson
fdf4954a20 Added back in function name to wave.do 2021-05-03 09:04:48 -05:00
Ross Thompson
b57c187208 Fixed typo in ifu for bypassing branch predictor. 
Fixed missing signal name in local history predictor.
 2021-05-03 08:56:45 -05:00
David Harris
c9806fb472 Fixed lint error in div 2021-05-03 09:26:12 -04:00
Noah Boorstin
491212c499 ok should be the final parsing script change from me 2021-05-03 01:37:24 -04:00
Noah Boorstin
de4dd848c8 buildroot: add one final utility script 2021-05-03 01:28:09 -04:00
Noah Boorstin
8d417558ae busybear: remove now unneeded hack for fixed CSR issue 2021-05-01 15:17:04 -04:00
Katherine Parry
9252d08b41 fpu imperas tests run 2021-05-01 02:18:01 +00:00
Noah Boorstin
c9fcd3405d rollback regression to 400k instrs for busybear 2021-04-29 20:59:30 -04:00
Domenico Ottolia
830787e3e1 Make vectored interrupt trap handling work, and add tests for mtvec with vectored interrupts 2021-04-29 20:42:14 -04:00
Ross Thompson
893e03d55b Fixed memory size in configs for rv32ic and rv64ic. 
Removed warning on call to $fscanf.
 2021-04-29 17:36:46 -05:00
Domenico Ottolia
8eb5195637 Add .S files for new mcause and scause tests 2021-04-29 16:48:56 -04:00
Domenico Ottolia
750d276feb Minor improvements to scause test 2021-04-29 16:48:07 -04:00
Domenico Ottolia
f18acc1476 Add .S and .reference_output files for mie tests 2021-04-29 16:40:48 -04:00
Domenico Ottolia
fdbd238a87 Add machine-mode timer interrupts to mcause tests 2021-04-29 16:39:18 -04:00
Domenico Ottolia
c9cb2f51d1 Same but don't break sim-wally this time 2021-04-29 15:33:27 -04:00
Domenico Ottolia
fdd4deec2f Add more exceptions to medeleg tests 2021-04-29 15:32:13 -04:00
ushakya22
de23edcfb9 fix to pcm bug 2021-04-29 15:21:08 -04:00
ushakya22
f139f248dc Working MIE timer tests 2021-04-29 15:19:43 -04:00
Domenico Ottolia
99a927be47 Add medeleg tests 2021-04-29 15:02:36 -04:00
Jarred Allen
246b41e604 Enhance lint-wally functionality 2021-04-29 14:48:41 -04:00
Jarred Allen
c6996ce39d Remove signal which no longer exists from default waves, so sim-wally works 2021-04-29 14:41:10 -04:00
Jarred Allen
000f48cd75 Fix compile error in branch predictor 2021-04-29 14:36:56 -04:00
Shreya Sanghai
b554dc8e72 fixed bug in gshare, global and local history BP 2021-04-29 06:14:32 -04:00
Noah Boorstin
9275f141f9 same but do that right this time 2021-04-28 14:27:28 -04:00
Domenico Ottolia
280cd94280 Make privileged makefiles actually execute tests when you say they should (compile-only is still default) 2021-04-27 23:09:01 -04:00
Domenico Ottolia
1c30625382 Modify make file to make privileged tests always pass Imperas (for testing interrupts) & Add mtvec/stvec tests 2021-04-27 21:47:38 -04:00
Noah Boorstin
fce3d6a8b1 busybear: respect branch predictor disable config 2021-04-27 15:52:18 -04:00
Ross Thompson
d191bc6cc1 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-04-26 14:28:09 -05:00
Ross Thompson
14a69c1d06 Added the ability to exclude branch predictor. 2021-04-26 14:27:42 -05:00
Noah Boorstin
922c8e450f ok but do that better 2021-04-26 14:38:05 -04:00
Noah Boorstin
24bbb674d3 linux: start using internal branch predictor signal 2021-04-26 14:34:38 -04:00
Ross Thompson
a7e4d39ea1 Fixed issue with not saving the first cache block read on a miss spill. 2021-04-26 12:57:34 -05:00
Noah Boorstin
9cbc769083 minor busybear fixes 2021-04-26 13:24:39 -04:00
Noah Boorstin
2e9bef1d75 minor parsing updates 2021-04-26 13:11:01 -04:00
Ross Thompson
44d28dbd1c Icache integrated! 
Merge branch 'icache-almost-working' into main
 2021-04-26 11:48:58 -05:00
Ross Thompson
615831f588 Reverted back the exe2memfile.pl script changes. Something I changed broke the load tests. 2021-04-26 10:44:27 -05:00
bbracker
f921886451 merge cleanup; mem init is broken 2021-04-26 08:00:17 -04:00
bbracker
7947858481 it says I need to merge in order to pull 2021-04-26 07:46:24 -04:00
bbracker
8d77012995 progress on bus and lrsc 2021-04-26 07:43:16 -04:00
Ross Thompson
9e40fb072c Merge branch 'tests' into icache-almost-working 2021-04-25 21:25:36 -05:00
Noah Boorstin
91df7b1f8b buildroot: change to new image 2021-04-25 15:15:14 -04:00
Noah Boorstin
76810f8423 busybear: hopefully last parser changes of the semester 2021-04-25 14:08:18 -04:00
Noah Boorstin
0ecb114dd6 parsing scripts update 2021-04-24 21:56:16 -04:00
bbracker
46a1616079 thomas fixed it before I did 2021-04-24 09:38:52 -04:00
bbracker
5687ab1c96 do script refactor 2021-04-24 09:32:09 -04:00
Thomas Fleming
ff675a5647 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-04-23 20:12:27 -04:00
Thomas Fleming
dc3ffc9244 Add address translation to busybear testbench 2021-04-23 20:12:20 -04:00
Thomas Fleming
6f23858609 Fix HSIZE and HBURST signal widths in PMA checker 2021-04-23 20:11:43 -04:00
David Harris
9c9fe56292 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-04-23 19:04:29 -04:00