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fixed bug in gshare, global and local history BP

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This commit is contained in:
Shreya Sanghai 2021-04-29 06:14:32 -04:00
parent 9275f141f9
commit b554dc8e72
3 changed files with 20 additions and 20 deletions
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14
wally-pipelined/src/ifu/globalHistoryPredictor.sv
View File

@ -41,13 +41,13 @@ module globalHistoryPredictor
input logic [1:0] UpdatePrediction
);
logic [k-1:0] GHRF, GHRD, GHRE, GHRENext;
assign GHRENext = {PCSrcE, GHRE[k-1:1]};
logic [k-1:0] GHRF, GHRFNext;
assign GHRFNext = {PCSrcE, GHRF[k-1:1]};
flopenr #(k) GlobalHistoryRegister(.clk(clk),
.reset(reset),
.en(UpdateEN),
.d(GHRENext),
.d(GHRFNext),
.q(GHRF));
@ -65,7 +65,7 @@ module globalHistoryPredictor
.RA1(GHRF),
.RD1(PredictionMemory),
.REN1(~StallF),
.WA1(GHRENext),
.WA1(GHRFNext),
.WD1(UpdatePrediction),
.WEN1(UpdateEN),
.BitWEN1(2'b11));
@ -73,7 +73,7 @@ module globalHistoryPredictor
// need to forward when updating to the same address as reading.
// first we compare to see if the update and lookup addreses are the same
assign DoForwarding = GHRF == GHRE;
assign DoForwarding = GHRF == GHRFNext;
// register the update value and the forwarding signal into the Fetch stage
// TODO: add stall logic ***
@ -90,7 +90,7 @@ module globalHistoryPredictor
assign Prediction = DoForwardingF ? UpdatePredictionF : PredictionMemory;
//pipeline for GHR
flopenrc #(k) GHRDReg(.clk(clk),
/*flopenrc #(k) GHRDReg(.clk(clk),
.reset(reset),
.en(~StallD),
.clear(FlushD),
@ -103,5 +103,5 @@ module globalHistoryPredictor
.clear(FlushE),
.d(GHRD),
.q(GHRE));
*/
endmodule

12
wally-pipelined/src/ifu/gshare.sv
View File

@ -42,24 +42,24 @@ module gsharePredictor
);
logic [k-1:0] GHRF, GHRD, GHRE, GHRENext;
logic [k-1:0] GHRF, GHRFNext;
//logic [k-1:0] LookUpPCIndexD, LookUpPCIndexE;
logic [k-1:0] LookUpPCIndex, UpdatePCIndex;
logic [1:0] PredictionMemory;
logic DoForwarding, DoForwardingF;
logic [1:0] UpdatePredictionF;
assign GHRENext = {PCSrcE, GHRE[k-1:1]};
assign GHRFNext = {PCSrcE, GHRF[k-1:1]};
flopenr #(k) GlobalHistoryRegister(.clk(clk),
.reset(reset),
.en(UpdateEN),
.d(GHRENext),
.d(GHRFNext),
.q(GHRF));
// for gshare xor the PC with the GHR
assign UpdatePCIndex = GHRENext ^ UpdatePC[k:1];
assign UpdatePCIndex = GHRFNext ^ UpdatePC[k:1];
assign LookUpPCIndex = GHRF ^ LookUpPC[k:1];
// Make Prediction by reading the correct address in the PHT and also update the new address in the PHT
// GHR referes to the address that the past k branches points to in the prediction stage
@ -110,7 +110,7 @@ module gsharePredictor
.q(LookUpPCIndexE));
-----/\----- EXCLUDED -----/\----- */
flopenrc #(k) GHRRegD(.clk(clk),
/* flopenrc #(k) GHRRegD(.clk(clk),
.reset(reset),
.en(~StallD),
.clear(FlushD),
@ -124,5 +124,5 @@ module gsharePredictor
.d(GHRD),
.q(GHRE));
*/
endmodule

14
wally-pipelined/src/ifu/localHistoryPredictor.sv
View File

@ -44,13 +44,13 @@ module localHistoryPredictor
);
logic [2**m-1:0][k-1:0] LHRNextF;
logic [k-1:0] LHRF, LHRD, LHRE, LHRENext, ForwardLHRNext;
logic [k-1:0] LHRF, ForwardLHRNext;
logic [m-1:0] LookUpPCIndex, UpdatePCIndex;
logic [1:0] PredictionMemory;
logic DoForwarding, DoForwardingF, DoForwardingPHT, DoForwardingPHTF;
logic [1:0] UpdatePredictionF;
assign LHRENext = {PCSrcE, LHRE[k-1:1]};
assign LHRFNext = {PCSrcE, LHRF[k-1:1]};
assign UpdatePCIndex = {UpdatePC[m+1] ^ UpdatePC[1], UpdatePC[m:2]};
assign LookUpPCIndex = {LookUpPC[m+1] ^ LookUpPC[1], LookUpPC[m:2]};
@ -72,7 +72,7 @@ generate
flopenr #(k) LocalHistoryRegister(.clk(clk),
.reset(reset),
.en(UpdateEN && (index == UpdatePCIndex)),
.d(LHRENext),
.d(LHRFNext),
.q(LHRNextF[index]));
end
endgenerate
@ -80,7 +80,7 @@ endgenerate
// need to forward when updating to the same address as reading.
// first we compare to see if the update and lookup addreses are the same
assign DoForwarding = LookUpPCIndex == UpdatePCIndex;
assign ForwardLHRNext = DoForwarding ? LHRENext :LHRNextF[LookUpPCIndex];
assign ForwardLHRNext = DoForwarding ? LHRFNext :LHRNextF[LookUpPCIndex];
// Make Prediction by reading the correct address in the PHT and also update the new address in the PHT
// LHR referes to the address that the past k branches points to in the prediction stage
@ -90,7 +90,7 @@ assign ForwardLHRNext = DoForwarding ? LHRENext :LHRNextF[LookUpPCIndex];
.RA1(ForwardLHRNext),
.RD1(PredictionMemory),
.REN1(~StallF),
.WA1(LHRENext),
.WA1(LHRFNext),
.WD1(UpdatePrediction),
.WEN1(UpdateEN),
.BitWEN1(2'b11));
@ -120,7 +120,7 @@ assign DoForwardingPHT = LHRENext == ForwardLHRNext;
.clear(FlushF),
.d(ForwardLHRNext),
.q(LHRF));
/*
flopenrc #(k) LHRDReg(.clk(clk),
.reset(reset),
.en(~StallD),
@ -134,5 +134,5 @@ assign DoForwardingPHT = LHRENext == ForwardLHRNext;
.clear(FlushE),
.d(LHRD),
.q(LHRE));
*/
endmodule