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https://github.com/openhwgroup/cvw
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Add more exceptions to medeleg tests
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@ -355,8 +355,8 @@ module testbench();
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"rv64p/WALLY-MIMPID", "4000",
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"rv64p/WALLY-MHARTID", "4000",
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"rv64p/WALLY-MVENDORID", "4000",
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"rv64p/WALLY-MEDELEG", "2000",
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"rv64p/WALLY-MIE", "3000"
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"rv64p/WALLY-MEDELEG", "4000"
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};
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string tests32p[] = '{
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@ -370,7 +370,7 @@ module testbench();
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"rv32p/WALLY-MIMPID", "4000",
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"rv32p/WALLY-MHARTID", "4000",
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"rv32p/WALLY-MVENDORID", "4000"
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//"rv32p/WALLY-MEDELEG", "2000" // all 32 bit tests are currently failing, so haven't been able to confirm this test works yet. It should, though.
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//"rv32p/WALLY-MEDELEG", "4000" // all 32 bit tests are currently failing, so haven't been able to confirm this test works yet. It should, though.
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};
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string tests64periph[] = '{
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@ -58,8 +58,13 @@ def writeVectors(storecmd, returningInstruction):
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# """)
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# User Timer Interrupt: True, 4
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Supervior timer interrupt: True, 5
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Machine timer interrupt: True, 7
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# if fromMode == "m":
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# clintAddr = "0x2004000"
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@ -152,10 +157,17 @@ def writeVectors(storecmd, returningInstruction):
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# """)
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# User external input: True, 8
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Supervisor external input: True, 9
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Machine externa input: True, 11
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Instruction address misaligned: False, 0
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# looks like this is giving us an infinite loop for wally
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# BUG: jumping to a misaligned instruction address doesn't cause an exception: we actually jump...
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# Either that, or somehow at the end we always end up at 0x80004002
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@ -166,6 +178,7 @@ def writeVectors(storecmd, returningInstruction):
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# """, False, 0)
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# Instruction access fault: False, 1
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Illegal Instruction
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writeTest(storecmd, f, r, f"""
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@ -184,16 +197,14 @@ def writeVectors(storecmd, returningInstruction):
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""", False, 4)
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# Load Access fault: False, 5
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Store/AMO address misaligned
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writeTest(storecmd, f, r, f"""
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sw x0, 11(x0)
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""", False, 6)
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# Environment call from u-mode: only for when only M and U mode enabled?
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# writeTest(storecmd, f, r, f"""
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# ecall
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# """, False, 8, "u")
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# Environment call
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if returningInstruction != "ecall":
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if fromMode == "u":
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writeTest(storecmd, f, r, f"""
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@ -213,8 +224,13 @@ def writeVectors(storecmd, returningInstruction):
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""", False, 11, "m")
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# Instruction page fault: 12
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Load page fault: 13
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Store/AMO page fault: 15
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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@ -52,26 +52,44 @@ def writeVectors(storecmd):
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# Instruction access fault: False, 1
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# Illegal Instruction
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#writeTest(storecmd, f, r, "ecall", False, 11, "m")
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#writeTest(storecmd, f, r, "ecall", False, 11)
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writeTest(storecmd, f, r, f"""
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.fill 1, 4, 0
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""", False, 2)
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# Breakpoint
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writeTest(storecmd, f, r, "ebreak", False, 3)
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# Load Address Misaligned
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# writeTest(storecmd, f, r, f"""
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# lw x0, 11(x0)
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# """, False, 4)
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writeTest(storecmd, f, r, f"""
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lw x0, 11(x0)
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""", False, 4)
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# # Load Access fault: False, 5
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# # Store/AMO address misaligned
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# writeTest(storecmd, f, r, f"""
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# sw x0, 11(x0)
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# """, False, 6)
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writeTest(storecmd, f, r, f"""
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sw x0, 11(x0)
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""", False, 6)
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# Breakpoint: codes 8, 9, 11
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writeTest(storecmd, f, r, "ecall", False, -1) # code determined inside of writeTest
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# Instruction page fault: 12
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Load page fault: 13
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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# Store/AMO page fault: 15
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# TODO: THIS NEEDS TO BE IMPLEMENTED
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#writeTest(storecmd, f, r, "ecall", False, 11, "m")
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def writeTest(storecmd, f, r, test, interrupt, code, mode = "m", resetHander = ""):
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def writeTest(storecmd, f, r, test, interrupt, code, resetHander = ""):
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global testnum
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global testMode
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global isInterrupts
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@ -79,9 +97,18 @@ def writeTest(storecmd, f, r, test, interrupt, code, mode = "m", resetHander = "
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if interrupt != isInterrupts:
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return
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mask = 1 << code
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delegateType = "i" if interrupt else "e"
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for mode in (["m", "s", "u"] if testMode == "m" else ["s", "u"]):
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if test == "ecall":
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if mode == "m":
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code = 11
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elif mode == "s":
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code = 9
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else:
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code = 8
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mask = 1 << code
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for delegated in [True, False]:
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labelSuffix = testnum
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@ -235,11 +262,9 @@ for xlen in xlens:
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csrr x17, medeleg
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""")
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print("\n\n" + basename)
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testnum = 0
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for i in range(0, 2):
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writeVectors(storecmd)
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print(testnum)
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f.write(f"""
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csrw mtvec, x19
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