David Harris
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b4a422f771
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Comparator experiments
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2022-05-03 10:54:30 +00:00 |
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David Harris
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057524b840
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Formatting cache.sv
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2022-05-03 10:53:20 +00:00 |
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David Harris
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9e50c3440d
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sram1p1rw extra bits are complaining on Tera and VLSI; roll back to two always blocks to fix on Tera
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2022-05-03 03:50:41 -07:00 |
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David Harris
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0df73d203b
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Rewriting sram1p1rw to combine CacheData into a single always_ff. Extra bits are still giving warning on VLSI that don't make sense.
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2022-05-03 03:45:41 -07:00 |
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David Harris
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9e47fca2b7
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Changed loop variable in CLINT because of error only seen on VLSI
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2022-05-03 10:10:28 +00:00 |
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Kip Macsai-Goren
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64ba550493
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general test cleanup of comments and old files
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2022-04-29 19:55:29 +00:00 |
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Kip Macsai-Goren
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36f5624255
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re-renamed status-mie-s to status-sie
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2022-04-29 19:55:13 +00:00 |
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Kip Macsai-Goren
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75e90f193e
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added missing SIE test
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2022-04-29 19:54:29 +00:00 |
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Kip Macsai-Goren
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407cdfbab7
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renamed registers in test library to RISC-V ABI name rater than x2, etc..
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2022-04-29 18:52:42 +00:00 |
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Kip Macsai-Goren
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c0b56bfd27
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renamed PIE-stack tests to status-mie for clarity
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2022-04-29 18:30:39 +00:00 |
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Kip Macsai-Goren
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c47ec36bc7
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removed old unused tests from wally arch tests
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2022-04-28 18:14:08 +00:00 |
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Kip Macsai-Goren
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2f17edb5f4
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added missing output for sret
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2022-04-28 18:14:08 +00:00 |
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Kip Macsai-Goren
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746fcfde30
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set WFI timeout to after 16 bits of counting for all configs
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2022-04-28 18:14:08 +00:00 |
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Kip Macsai-Goren
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aedf0341af
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added 32 bit versions of new tests. all but timeout wait pass regression
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2022-04-28 18:14:07 +00:00 |
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Skylar Litz
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64a537c59b
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-04-27 10:50:19 -07:00 |
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Skylar Litz
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f2b6842edb
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fix AttemptedInstructionCount from ground zero
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2022-04-27 10:45:40 -07:00 |
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David Harris
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55d25a1a89
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Ignore intermediate files in synthesis sweeps
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2022-04-27 13:12:04 +00:00 |
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David Harris
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515270a8cf
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Added torture.tv test vectors
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2022-04-27 13:08:36 +00:00 |
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David Harris
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cce0a421be
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Checked in torture.tv
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2022-04-27 13:06:24 +00:00 |
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David Harris
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9d82232c14
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Cleaned up canonical NaNs and removed denorm outputs in baby_torture.tv
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2022-04-26 19:41:30 +00:00 |
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Kip Macsai-Goren
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4b00531d77
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fixed incorrect configs in regression
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2022-04-25 19:28:47 +00:00 |
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Kip Macsai-Goren
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d741faf7f3
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added missing output on final test terminating ecall
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2022-04-25 19:18:38 +00:00 |
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Kip Macsai-Goren
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74b103fae4
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added working tests to test list, updated regression for new configs
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2022-04-25 19:18:15 +00:00 |
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Kip Macsai-Goren
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33875b20b5
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fixed initial value, timing on fs bits changing after floating point instruction
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2022-04-25 19:17:29 +00:00 |
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Kip Macsai-Goren
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1c3e6b98e4
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split status.fp tests into fp enabled/disabled
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2022-04-25 19:16:15 +00:00 |
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Kip Macsai-Goren
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2e0f45eab4
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removed atomic, floating point from privileged tests configs
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2022-04-25 19:13:15 +00:00 |
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Kip Macsai-Goren
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01f8bdfafc
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added new tests to tests.vh, comented out until they pass regression
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2022-04-25 18:22:44 +00:00 |
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Kip Macsai-Goren
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36e82e8613
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added WFI and mstatus fp, tw bit tests
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2022-04-25 18:21:56 +00:00 |
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Kip Macsai-Goren
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e0a1a54678
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added floating point instructions to privileged tests
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2022-04-25 17:47:10 +00:00 |
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Kip Macsai-Goren
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992cedbc52
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Lowered WFI timeout wait time for privileged configs
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2022-04-25 17:47:10 +00:00 |
|
Kip Macsai-Goren
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42eb771521
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comment cleanup
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2022-04-25 17:47:10 +00:00 |
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Shreya Sanghai
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975005dbfa
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automate synth
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2022-04-25 16:03:32 +00:00 |
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bbracker
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ce56e2dd73
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-04-25 08:01:39 -07:00 |
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David Harris
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0957b7040d
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Restored MPRV behavior per spec
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2022-04-25 14:52:18 +00:00 |
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David Harris
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1a8369b02b
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Added dummy mstatus byte endianness fields tied to 0, mstatush register, removed UIE and UPIE depricated fields
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2022-04-25 14:49:00 +00:00 |
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bbracker
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6f63b88c60
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upgrade Buildroot Makefile to also copy over vmlinux
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2022-04-25 07:36:59 -07:00 |
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David Harris
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142636173e
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Added MTINST hardwired to 0, and added timeout of U-mode WFI
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2022-04-24 20:00:02 +00:00 |
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David Harris
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28e8aa4f97
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Fixed InstrMisalignedFaultM mtval
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2022-04-24 17:31:30 +00:00 |
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David Harris
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ffecdda6e6
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Improved priority order and mtval of traps to match spec
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2022-04-24 17:24:45 +00:00 |
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David Harris
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04b0579b89
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Extended sim time to fully boot Linux. Added comments to hazard unit
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2022-04-24 13:51:00 +00:00 |
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Kip Macsai-Goren
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08d4c29724
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Removed test cases irrelevant to this implementation, added explanatory comments.
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2022-04-22 23:06:52 +00:00 |
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Kip Macsai-Goren
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abfbbaccba
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Added testing for every bit field in MIE, rather than just one
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2022-04-22 23:05:54 +00:00 |
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Kip Macsai-Goren
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7630a0be42
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fixed timeouts on GPIO test by enabling pins as inputs as well as outputs.
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2022-04-22 22:46:11 +00:00 |
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Kip Macsai-Goren
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bd87af478a
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Changed mtval for instruction misaligned fault to get address from ieuAdrM (Jal/branch target address)
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2022-04-22 22:46:11 +00:00 |
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bbracker
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cd70175e5a
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less hardcoded paths in Makefile
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2022-04-21 20:42:02 -07:00 |
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bbracker
|
9eec1a83a6
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deprecate unused LINUX_FIX_READ macro
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2022-04-21 19:14:47 -07:00 |
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bbracker
|
9c1e398bb5
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change how tristate I/O is spoofed in GPIO loopback test
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2022-04-21 10:31:16 -07:00 |
|
Ross Thompson
|
e56b9f18d5
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-04-21 09:52:42 -05:00 |
|
Ross Thompson
|
a86274a1e0
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Modified wally-pipelined.do for no trace linux sim.
|
2022-04-21 09:52:33 -05:00 |
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David Harris
|
6793533676
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Removed FP vectors Readme
|
2022-04-21 04:55:27 +00:00 |
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