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renamed PIE-stack tests to status-mie for clarity

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This commit is contained in:
Kip Macsai-Goren 2022-04-29 18:30:39 +00:00
parent c47ec36bc7
commit c0b56bfd27
13 changed files with 9 additions and 85 deletions
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10
pipelined/testbench/tests.vh
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@ -1467,8 +1467,8 @@ string imperas32f[] = '{
"rv64i_m/privilege/WALLY-MIE-01", "0050a0",
"rv64i_m/privilege/WALLY-mtvec-01", "0050a0",
"rv64i_m/privilege/WALLY-stvec-01", "0050a0",
"rv64i_m/privilege/WALLY-PIE-stack-01", "0050a0",
"rv64i_m/privilege/WALLY-PIE-stack-s-01", "0050a0",
"rv64i_m/privilege/WALLY-status-mie-01", "0050a0",
"rv64i_m/privilege/WALLY-status-mie-s-01", "0050a0",
"rv64i_m/privilege/WALLY-trap-sret-01", "0050a0",
// "rv64i_m/privilege/WALLY-status-tw-01", "0050a0",
"rv64i_m/privilege/WALLY-WFI-01", "0050a0",
@ -1546,10 +1546,10 @@ string wally32i[] = '{
"rv32i_m/privilege/WALLY-MIE-01", "5080",
"rv32i_m/privilege/WALLY-mtvec-01", "5080",
"rv32i_m/privilege/WALLY-stvec-01", "5080",
"rv32i_m/privilege/WALLY-PIE-stack-01", "5080",
"rv32i_m/privilege/WALLY-PIE-stack-s-01", "5080",
"rv32i_m/privilege/WALLY-status-mie-01", "5080",
"rv32i_m/privilege/WALLY-status-mie-s-01", "5080",
"rv32i_m/privilege/WALLY-trap-sret-01", "5080",
// "rv32i_m/privilege/WALLY-status-tw-01", "5080",
// "rv32i_m/privilege/WALLY-status-tw-01", "5080", *** this test doesn't pass yet because PC counts up while wfi is spinning
"rv32i_m/privilege/WALLY-WFI-01", "5080",
"rv32i_m/privilege/WALLY-status-fp-disabled-01", "5080"

4
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/Makefrag
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@ -44,8 +44,8 @@ target_tests_nosim = \
WALLY-mtvec-01 \
WALLY-stvec-01 \
WALLY-MIE-01 \
WALLY-PIE-stack-01 \
WALLY-PIE-stack-s-01 \
WALLY-status-mie-01 \
WALLY-status-mie-s-01 \
WALLY-trap-sret-01 \
WALLY-trap-01 \
WALLY-trap-s-01 \

0
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-PIE-stack-01.reference_output → tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-status-mie-01.reference_output
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0
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-PIE-stack-s-01.reference_output → tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-status-mie-s-01.reference_output
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35
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-scratch-01.S
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@ -1,35 +0,0 @@
///////////////////////////////////////////
//
// WALLY-scratch
//
// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
// Created 2022-02-20
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "WALLY-TEST-LIB-32.h"
INIT_TESTS
TRAP_HANDLER m
// Test 5.3.2.3: Scratch registers test
WRITE_READ_CSR mscratch, 0x111 // check that mscratch is readable and writeable in machine mode
END_TESTS
TEST_STACK_AND_DATA

39
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-sscratch-s-01.S
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@ -1,39 +0,0 @@
///////////////////////////////////////////
//
// WALLY-sscratch
//
// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
// Created 2022-02-20
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "WALLY-TEST-LIB-32.h"
INIT_TESTS
TRAP_HANDLER m
// Test 5.3.2.3: Scratch registers test
WRITE_READ_CSR sscratch, 0x111 // check that sscratch is readable and writeable in machine mode
GOTO_S_MODE 0x0, 0x0
WRITE_READ_CSR sscratch, 0xAAA // check that sscratch is readable and writeable in supervisor mode
END_TESTS
TEST_STACK_AND_DATA

0
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-PIE-stack-01.S → tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-mie-01.S
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0
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-PIE-stack-s-01.S → tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-mie-s-01.S
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4
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag
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@ -46,8 +46,8 @@ target_tests_nosim = \
WALLY-mtvec-01 \
WALLY-stvec-01 \
WALLY-MIE-01 \
WALLY-PIE-stack-01 \
WALLY-PIE-stack-s-01 \
WALLY-status-mie-01 \
WALLY-status-mie-s-01 \
WALLY-trap-01 \
WALLY-trap-s-01 \
WALLY-trap-u-01 \

0
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-PIE-stack-01.reference_output → tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-status-mie-01.reference_output
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0
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-PIE-stack-s-01.reference_output → tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-status-mie-s-01.reference_output
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1
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PIE-stack-01.S → tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-mie-01.S
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@ -35,7 +35,6 @@ WRITE_READ_CSR mie, 0xFFF
// test 5.3.1.6 Interrupt enabling and priority tests
// Cause interrupt, ensuring that status.mie = 0 , status.mpie = 1, and status.mpp = 11 during trap handling
jal cause_m_soft_interrupt /// only cause one interrupt because we just want to test the status stack
li x28, 0x8

1
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PIE-stack-s-01.S → tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-mie-s-01.S
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@ -39,7 +39,6 @@ WRITE_READ_CSR mideleg 0xFFFF // delegate all interrupts to S mode.
GOTO_S_MODE
// Cause interrupt, ensuring that status.sie = 0 , status.spie = 1, and status.spp = 1 during trap handling
jal cause_s_soft_interrupt // only cause one interrupt because we just want to test the status stack
li x28, 0x2