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Author	SHA1	Message	Date
David Harris	c9aa21d5a3	FPU debug and configurable logic cleanup	2022-01-06 18:10:25 +00:00
David Harris	e33db012ba	Reinstated many arch f/d tests that had failed because of memfile issues	2022-01-05 22:44:10 +00:00
David Harris	31067c8e7d	Restored many of the arch32f and arch64d that had been failing because of memfile issues	2022-01-05 22:23:46 +00:00
David Harris	643732b552	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-05 22:10:50 +00:00
Kip Macsai-Goren	e8780878b6	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-05 22:10:37 +00:00
David Harris	30c1ab5213	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-05 22:10:33 +00:00
David Harris	355efda9bc	Replaced exe2memfile with SiFive elf2hex	2022-01-05 22:10:26 +00:00
Kip Macsai-Goren	172b6190f4	updated pma tests for simpler test lib	2022-01-05 22:10:12 +00:00
kipmacsaigoren	980bc8067a	Added the config file to the outputs of synth	2022-01-05 16:08:31 -06:00
Kip Macsai-Goren	bf062e2ed7	updated tests to make correctly with output verification	2022-01-05 21:43:15 +00:00
Kip Macsai-Goren	4efe6813dd	allowed option for tests to make without spike simulation. added postverify back in for outputs	2022-01-05 21:17:54 +00:00
Kip Macsai-Goren	1a9de1fae5	updated pma tests to match simpler test library. They don't pass regression yet	2022-01-05 21:13:40 +00:00
Kip Macsai-Goren	fb8984c8cf	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-05 20:17:52 +00:00
Ross Thompson	75788dd9c2	Changes to wave file.	2022-01-05 14:16:59 -06:00
Ross Thompson	bd901cd125	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-01-05 14:15:27 -06:00
Ross Thompson	49eea2add5	Fixed bug with flush dirty not cleared in the correct cache line.	2022-01-05 14:14:01 -06:00
davidharrishmc	20b13a4895	Update README.md	2022-01-05 11:29:54 -08:00
Kip Macsai-Goren	7abddf8719	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-05 18:38:29 +00:00
James E. Stine	64b4981ca1	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-05 10:44:28 -06:00
James E. Stine	17e9ff4610	Add script to generate memfile using elf2hex	2022-01-05 10:44:01 -06:00
David Harris	85fa620cfb	Finished removing generate statements	2022-01-05 16:41:17 +00:00
David Harris	32590d484c	Removed more generate statements	2022-01-05 16:25:08 +00:00
David Harris	f04856ee94	Removed more generate statements	2022-01-05 16:01:03 +00:00
David Harris	c1d6550ccb	Removed generate statements	2022-01-05 14:35:25 +00:00
Ross Thompson	f89c1d91dc	Renamed most signals inside cache.sv so they are agnostic to i or d.	2022-01-04 23:52:42 -06:00
Ross Thompson	9eda7c12bd	the i and d caches now share common verilog.	2022-01-04 23:40:37 -06:00
Ross Thompson	b06c3b8acd	parameterized the caches with the goal of using common rtl for both i and d caches.	2022-01-04 22:40:51 -06:00
Ross Thompson	06168e67e4	Switched block for line in caches.	2022-01-04 22:08:18 -06:00
Ross Thompson	d94a1c6404	Fixed bug where last line of dcache was not written back to memory on dcache flush.	2022-01-04 21:55:48 -06:00
Ross Thompson	0dd61a57da	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-01-04 18:41:52 -06:00
Ross Thompson	3c3c6d0fe8	Fixed dcache flush.	2022-01-04 18:40:58 -06:00
David Harris	08e6a10480	Removed imperas mmu tests; using wallypriv instead	2022-01-04 23:14:53 +00:00
Kip Macsai-Goren	17b9143d10	cleaned up Imperas tests to pass make	2022-01-04 21:32:21 +00:00
Kip Macsai-Goren	87ba45ce36	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-04 21:30:51 +00:00
Kip Macsai-Goren	0ee4e03cd6	fixed arch tests to pass make, added 32 bit tests, addded all make-passing tests to tests.vh.	2022-01-04 21:30:38 +00:00
David Harris	57daff45c8	Fixed bad address for F/fmsub_b18-01	2022-01-04 21:04:06 +00:00
Kip Macsai-Goren	ad3ee6bc08	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-04 20:58:08 +00:00
David Harris	1f07470477	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-04 19:47:51 +00:00
David Harris	b36ace221e	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
Kip Macsai-Goren	d1709e98d2	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-04 18:16:46 +00:00
Ross Thompson	f3a300738f	Added mmu tests to regression-wally. ... imperas64mmu passes but imperas32mmu does not.	2022-01-04 11:13:36 -06:00
Ross Thompson	7ac412eb8e	Modified dcache to ensure nontranslated index is used.	2022-01-04 10:53:53 -06:00
Kip Macsai-Goren	9ad44e3e97	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-04 06:38:28 +00:00
Ross Thompson	1ea267cab5	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-01-03 23:49:28 -06:00
Ross Thompson	08b439b9e9	Fixed icache stalling cpu when doing an uncached operation.	2022-01-03 23:49:19 -06:00
Kip Macsai-Goren	cc0409b9d6	update 64 bit tests to make make work correctly and general cleanup	2022-01-04 05:02:33 +00:00
Kip Macsai-Goren	cbe255230e	Update 32 bit memory tests to make make work correcttly and generally cleanup	2022-01-04 04:59:47 +00:00
Kip Macsai-Goren	a74b0b8f56	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-01-04 04:55:36 +00:00
Ross Thompson	4b4aa11684	Reordered inputs/outputs in caches.	2022-01-03 22:52:50 -06:00
Ross Thompson	fa39de9cef	Added generate around the spill logic so it is only used if supporting compressed instructions.	2022-01-03 22:23:04 -06:00