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FPU debug and configurable logic cleanup

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This commit is contained in:
David Harris 2022-01-06 18:10:25 +00:00
parent e33db012ba
commit c9aa21d5a3
12 changed files with 16 additions and 7424 deletions
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13
pipelined/src/fpu/unpacking.sv
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@ -20,6 +20,12 @@ module unpacking (
logic XFracZero, YFracZero, ZFracZero; // input fraction zero
logic XExpZero, YExpZero, ZExpZero; // input exponent zero
logic YExpMaxE, ZExpMaxE; // input exponent all 1s
logic XDoubleNaN, YDoubleNaN, ZDoubleNaN;
// Determine if number is NaN as double precision to check single precision NaN boxing
assign XDoubleNaN = &X[62:52] & |X[51:0];
assign YDoubleNaN = &Y[62:52] & |Y[51:0];
assign ZDoubleNaN = &Z[62:52] & |Z[51:0];
assign XSgnE = FmtE ? X[63] : X[31];
assign YSgnE = FmtE ? Y[63] : Y[31];
@ -55,9 +61,10 @@ module unpacking (
assign XNormE = ~(XExpMaxE|XExpZero);
assign XNaNE = XExpMaxE & ~XFracZero;
assign YNaNE = YExpMaxE & ~YFracZero;
assign ZNaNE = ZExpMaxE & ~ZFracZero;
// force single precision input to be a NaN if it isn't properly Nan Boxed
assign XNaNE = XExpMaxE & ~XFracZero | ~FmtE & ~XDoubleNan;
assign YNaNE = YExpMaxE & ~YFracZero | ~FmtE & ~YDoubleNan;
assign ZNaNE = ZExpMaxE & ~ZFracZero | ~FmtE & ~ZDoubleNan;
assign XSNaNE = XNaNE&~XFracE[51];
assign YSNaNE = YNaNE&~YFracE[51];

2
pipelined/src/ieu/regfile.sv
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@ -45,7 +45,7 @@ module regfile (
always_ff @(negedge clk) // or posedge reset)
if (reset) for(i=1; i<32; i++) rf[i] <= 0;
else if (we3) rf[a3] <= wd3;
else if (we3) rf[a3] <= wd3;
assign #2 rd1 = (a1 != 0) ? rf[a1] : 0;
assign #2 rd2 = (a2 != 0) ? rf[a2] : 0;

37
pipelined/src/mmu/decoder.sv
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@ -1,37 +0,0 @@
///////////////////////////////////////////
// decoder.sv
//
// Written: tfleming@hmc.edu & jtorrey@hmc.edu 7 April 2021
// Modified:
//
// Purpose: Binary encoding to one-hot decoder
//
// A component of the Wally configurable RISC-V project.
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
`include "wally-config.vh"
module decoder #(parameter BINARY_BITS = 3) (
input logic [BINARY_BITS-1:0] binary,
output logic [(2**BINARY_BITS)-1:0] onehot
);
// *** Double check whether this synthesizes as expected
// -- Ben @ May 4: only warning is that "signed to unsigned assignment occurs"; that said, I haven't checked the netlists
assign onehot = 1 << binary;
endmodule

42
pipelined/src/mmu/priorityonehot.sv
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@ -1,42 +0,0 @@
///////////////////////////////////////////
// priorityonehot.sv
//
// Written: tfleming@hmc.edu & jtorrey@hmc.edu 7 April 2021
// Modified: Teo Ene 15 Apr 2021:
// Temporarily removed paramterized priority encoder for non-parameterized one
// To get synthesis working quickly
// Kmacsaigoren@hmc.edu 28 May 2021:
// Added working version of parameterized priority encoder.
// David_Harris@Hmc.edu switched to one-hot output
//
// Purpose: Priority circuit to choose most significant one-hot output
//
// A component of the Wally configurable RISC-V project.
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
`include "wally-config.vh"
module priorityonehot #(parameter ENTRIES = 8) (
input logic [ENTRIES-1:0] a,
output logic [ENTRIES-1:0] y
);
logic [ENTRIES-1:0] nolower;
// create thermometer code mask
prioritythermometer #(ENTRIES) maskgen(.a({a[ENTRIES-2:0], 1'b1}), .y(nolower));
assign y = a & nolower;
endmodule

53
pipelined/src/mmu/prioritythermometer.sv
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@ -1,53 +0,0 @@
///////////////////////////////////////////
// priritythermometer.sv
//
// Written: tfleming@hmc.edu & jtorrey@hmc.edu 7 April 2021
// Modified: Teo Ene 15 Apr 2021:
// Temporarily removed paramterized priority encoder for non-parameterized one
// To get synthesis working quickly
// Kmacsaigoren@hmc.edu 28 May 2021:
// Added working version of parameterized priority encoder.
// David_Harris@Hmc.edu switched to one-hot output
//
// Purpose: Priority circuit to choose most significant one-hot output
//
// A component of the Wally configurable RISC-V project.
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
`include "wally-config.vh"
/* verilator lint_off UNOPTFLAT */
module prioritythermometer #(parameter N = 8) (
input logic [N-1:0] a,
output logic [N-1:0] y
);
// Carefully crafted so design compiler will synthesize into a fast tree structure
// Rather than linear.
// create thermometer code mask
genvar i;
assign y[0] = a[0];
for (i=1; i<N; i++) begin:therm
assign y[i] = y[i-1] & ~a[i];
end
endmodule
/* verilator lint_on UNOPTFLAT */

5
pipelined/src/mmu/tlbram.sv
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@ -40,8 +40,9 @@ module tlbram #(parameter TLB_ENTRIES = 8) (
logic [`PPN_BITS+9:0] PageTableEntry;
// RAM implemented with array of flops and AND/OR read logic
tlbramline #(`PPN_BITS+10) tlblineram[TLB_ENTRIES-1:0](clk, reset, Matches, WriteEnables, PTE[`PPN_BITS+9:0], RamRead, PTE_Gs);
//assign PageTableEntry = RamRead.or; // OR each column of RAM read to read PTE
tlbramline #(`PPN_BITS+10) tlbramline[TLB_ENTRIES-1:0]
(.clk, .reset, .re(Matches), .we(WriteEnables),
.d(PTE[`PPN_BITS+9:0]), .q(RamRead), .PTE_G(PTE_Gs));
or_rows #(TLB_ENTRIES, `PPN_BITS+10) PTEOr(RamRead, PageTableEntry);
// Rename the bits read from the TLB RAM

4
pipelined/testbench/tests.vh
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@ -1297,7 +1297,7 @@ string imperas32f[] = '{
"rv32i_m/F/feq_b1-01", "6220",
"rv32i_m/F/feq_b19-01", "a190",
"rv32i_m/F/fle_b1-01", "6220",
// "rv32i_m/F/fle_b19-01", "a190", // looks fine to me is the actual input value supposed to be infinity?
"rv32i_m/F/fle_b19-01", "a190", // looks fine to me is the actual input value supposed to be infinity?
"rv32i_m/F/flt_b1-01", "6220",
"rv32i_m/F/flt_b19-01", "8ee0",
"rv32i_m/F/flw-align-01", "2010",
@ -1323,7 +1323,7 @@ string imperas32f[] = '{
"rv32i_m/F/fmsub_b15-01", "19bb30",
"rv32i_m/F/fmsub_b16-01", "39d0",
"rv32i_m/F/fmsub_b17-01", "39d0",
"rv32i_m/F/fmsub_b18-01", "4d20", // test looks fine to me: 7e9db2ee (large number) * -0 - f1bffff8 = f1bffff8 but wants 7f800000 (NaN)
"rv32i_m/F/fmsub_b18-01", "4d20",
"rv32i_m/F/fmsub_b2-01", "4d60",
"rv32i_m/F/fmsub_b3-01", "d4f0",
"rv32i_m/F/fmsub_b4-01", "3700",

3
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/Makefrag
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@ -28,9 +28,6 @@
# Description: Makefrag for RV64I architectural tests
rv64i_sc_tests = \
add-01 \
PIPELINE \
rv64i_tests = $(addsuffix .elf, $(rv64i_sc_tests))

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tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/references/PIPELINE.reference_output
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tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/references/add-01.reference_output
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tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/PIPELINE.S
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tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/add-01.S
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