Ross Thompson
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de4ea16d32
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Merge branch 'main' into fpga
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2021-10-20 16:24:55 -05:00 |
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David Harris
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ceaf84a3ce
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removed .* from wallypipeliendsoc
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2021-10-20 13:49:18 -07:00 |
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Ross Thompson
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cefbcd1b0c
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Partially sd card read on fpga.
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2021-09-30 11:23:09 -05:00 |
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Ross Thompson
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af53657eaf
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Merge branch 'sdc' into fpga
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2021-09-25 19:33:07 -05:00 |
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Ross Thompson
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fea439b84d
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SDC to ABHLite interface partially done.
Added SDC to adrdec and uncore.
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2021-09-24 10:45:09 -05:00 |
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Ross Thompson
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af74a8c5cb
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Third attempt at fixing the write enables for the icache cacheway.
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2021-09-09 15:49:27 -05:00 |
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David Harris
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fa51ab9f68
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Refactored pmachecker to have adrdecs used in uncore
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2021-06-23 01:41:00 -04:00 |
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bbracker
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303f8e2a7f
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give EBU a dedicated PMA unit as just an address decoder
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2021-06-22 18:28:08 -04:00 |
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David Harris
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336936cc39
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Cleaned up name of MTIME register in CSRC
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2021-06-18 07:53:49 -04:00 |
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bbracker
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5a661a7392
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provide time and timeh CSRs based on CLINT's counter
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2021-06-17 08:38:30 -04:00 |
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Thomas Fleming
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38236e9172
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Implement first pass at the PMA checker
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2021-04-22 15:34:02 -04:00 |
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Thomas Fleming
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3c49fd08f6
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Remove imem from testbenches
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2021-04-14 20:20:34 -04:00 |
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bbracker
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31c6b2d01f
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Yee hoo first draft of PLIC plus self-checking tests
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2021-04-04 06:40:53 -04:00 |
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David Harris
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015b632eb1
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Cleaned out unused signals
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2021-02-26 09:17:36 -05:00 |
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David Harris
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f5e9c91193
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All tests passing with bus interface
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2021-02-24 07:25:03 -05:00 |
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David Harris
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3551cc859b
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Data memory bus integration
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2021-02-07 23:21:55 -05:00 |
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David Harris
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4fbb5f0f1b
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Cleaned up hazard interface
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2021-02-02 13:53:13 -05:00 |
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David Harris
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9d7e242596
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Moved fpu to temporary location to fix compile and cleaned up interface formatting
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2021-02-01 23:44:41 -05:00 |
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David Harris
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396cea1ea7
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Reorganized src hierarchically
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2021-01-30 11:50:37 -05:00 |
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