19 Commits

Author	SHA1	Message	Date
Ross Thompson	829c6ea264	Added explainations of synthesis variables in README.	2022-02-09 18:47:20 -06:00
Ross Thompson	8a10198d43	Added saif to synthDC flow.	2022-02-09 18:42:48 -06:00
Ross Thompson	02abb31f5a	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-09 16:44:33 -06:00
Ross Thompson	ec9ac430cd	Commented quit.	2022-02-09 16:44:26 -06:00
James E. Stine	186185ef8b	Update on README.md for synthDC	2022-02-09 16:20:05 -06:00
Ross Thompson	74bccc468c	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-09 16:11:31 -06:00
Ross Thompson	3bbc044d11	Added support for 90nm.	2022-02-09 16:06:27 -06:00
James E. Stine	2eef7ec0ee	Add power analysis to synth.tcl	2022-02-09 16:04:20 -06:00
Ross Thompson	5a654a2874	Cleaned up synthesis flow.	2022-02-09 15:18:49 -06:00
Ross Thompson	380085ca20	Updated synthesis and Makefile to output into binned directories.	2022-02-09 15:06:42 -06:00
David Harris	dbcad218dd	Merged synthesiss scripts into main	2022-02-09 19:47:50 +00:00
James Stine	dae826bd75	Update synthesis script for overwrite during copy	2022-02-03 20:29:03 -06:00
James Stine	b96d0e7095	Update to 12T for synthesis	2022-02-03 19:42:03 -06:00
David Harris	a7c4eb0399	Synth for 500 MHz	2022-02-04 01:06:13 +00:00
David Harris	ec552dff19	Adjusted synthesis to compile rv32e on 12T library	2022-02-04 00:45:16 +00:00
David Harris	ef5af9b5fd	renamed configs	2022-02-03 23:36:41 +00:00
James Stine	2405454c85	Change DC script to not do a full synthesis but partial synthesis until I configure to be more optimized	2022-01-30 21:02:41 -06:00
James Stine	af8aa56a67	Add synthesis using DC shell back into repository	2022-01-30 17:35:15 -06:00
James Stine	00619eda07	Add synthesis using DC shell back into repository	2022-01-30 17:34:56 -06:00